Semiconductor device
A semiconductor device includes: a semiconductor base body of a first conductivity-type; a first well region of a second conductivity-type provided in the semiconductor base body; at least one second well region of the first conductivity-type implementing a part of a high-side circuit provided in the first well region; a buried layer of the second conductivity-type provided at a bottom of the first well region and having a higher impurity concentration than the first well region; a voltage blocking region of the second conductivity-type provided at a circumference of the first well region; and an extraction region of the first conductivity-type provided to have a greater depth than the second well region at least at a part of a circumference of the high-side circuit in the first well region so as to be opposed to the second well region.
1 . A semiconductor device comprising:
a semiconductor base body of a first conductivity-type;
a first well region of a second conductivity-type provided in the semiconductor base body;
at least one second well region of the first conductivity-type implementing a part of a high-side circuit provided in the first well region;
a buried layer of the second conductivity-type provided at a bottom of the first well region and having a higher impurity concentration than the first well region;
a voltage blocking region of the second conductivity-type provided at a circumference of the first well region; and
an extraction region of the first conductivity-type provided in the first well region to have a greater depth than a depth of the at least one second well region at least at a part of a circumference of the high-side circuit so as to be separated from the at least one second well region between the voltage blocking region and the at least one second well region.
2 . The semiconductor device of claim 1 , wherein a bottom of the extraction region is in contact with the buried layer.
3 . The semiconductor device of claim 1 , wherein the extraction region has a loop-shaped planar pattern surrounding the circumference of the high-side circuit.
4 . The semiconductor device of claim 1 , wherein a level shifter is provided in a part of the voltage blocking region.
5 . The semiconductor device of claim 1 , wherein the extraction region is electrically connected to the first well region.
6 . The semiconductor device of claim 1 , wherein the first well region has a greater depth than the voltage blocking region.
7 . The semiconductor device of claim 1 , further comprising an isolation region of the first conductivity-type provided at a circumference of the voltage blocking region.
8 . The semiconductor device of claim 7 , wherein the depth of the extraction region is common to a depth of the isolation region.
9 . The semiconductor device of claim 1 , further comprising a base region of the first conductivity-type provided in an upper part of the voltage blocking region.
10 . The semiconductor device of claim 9 , further comprising:
a carrier reception region of the second conductivity-type provided in the upper part of the voltage blocking region separately from the base region; and
a carrier supply region of the second conductivity-type provided in an upper part of the base region.
11 . The semiconductor device of claim 1 , wherein the extraction region is among a plurality of extraction regions arranged separately from each other in a direction from the high-side circuit toward the voltage blocking region.
12 . The semiconductor device of claim 1 , wherein a bottom of the extraction region is separated from the buried layer.
13 . The semiconductor device of claim 4 , wherein the extraction region is provided selectively in a part of the circumference of the high-side circuit opposed to the level shifter.
14 . The semiconductor device of claim 1 , further comprising:
a first electrode electrically connected to the at least one second well region; and
a second electrode electrically connected to the extraction region.
15 . The semiconductor device of claim 14 , wherein the second electrode is electrically connected to the first well region.
16 . A semiconductor device comprising:
a semiconductor base body of a first conductivity-type;
a first well region of a second conductivity-type provided in the semiconductor base body;
at least one second well region of the first conductivity-type implementing a part of a high-side circuit provided in the first well region;
a buried layer of the second conductivity-type provided at a bottom of the first well region and having a higher impurity concentration than the first well region;
a voltage blocking region of the second conductivity-type provided at a circumference of the first well region; and
an extraction region of the first conductivity-type provided to have a greater depth than the at least one second well region at least at a part of a circumference of the high-side circuit in the first well region so as to be opposed to the at least one second well region,
wherein the extraction region has a loop-shaped planar pattern surrounding the circumference of the high-side circuit.
17 . A semiconductor device comprising:
a semiconductor base body of a first conductivity-type;
a first well region of a second conductivity-type provided in the semiconductor base body;
at least one second well region of the first conductivity-type implementing a part of a high-side circuit provided in the first well region;
a buried layer of the second conductivity-type provided at a bottom of the first well region and having a higher impurity concentration than the first well region;
a voltage blocking region of the second conductivity-type provided at a circumference of the first well region; and
an extraction region of the first conductivity-type provided to have a greater depth than the at least one second well region at least at a part of a circumference of the high-side circuit in the first well region so as to be opposed to the at least one second well region,
wherein a level shifter is provided in a part of the voltage blocking region.