IP Library Granted Patent US 12707741
Granted Patent B2
US 12707741 · App. 17/908,658 · Granted Aug 11, 2026

Imaging element and semiconductor chip

Inventors: Hitoshi Okano (Kanagawa, JP); Kan Shimizu (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H10F39/805H10F39/18H10F39/809H10W72/20H10W72/90H10W72/952H10W90/724H10W90/792
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Quick Facts
Patent No.
US 12707741
App. No.
17/908,658
Granted
Aug 11, 2026
Kind
B2
Abstract

The present technology relates to an imaging element and a semiconductor chip that can implement a low height of the imaging element. A first chip including a photo diode; and a second chip including a circuit processing a signal transmitted from the photo diode are stacked, and a charging film is disposed on a second face of the second chip that is on a side opposite to a first face on which the first chip is stacked. The charging film is disposed in a part or the entirety of the second face. For example, the present technology can be applied to an imaging element, in which a plurality of chips are configured to be stacked, that can implement a low height and a small size.

Claims (39)

1 . An imaging device, comprising:

a first substrate, including:

a first semiconductor substrate;

a first multi-layer wiring layer stacked on the first semiconductor substrate; and

a first pad included in the first multi-layer wiring layer;

a second substrate, including:

a second semiconductor substrate;

a second multi-layer wiring layer stacked on a first side of the second semiconductor substrate;

a second pad included in the second multi-layer wiring layer; and

a third pad disposed on a second side of the second substrate that is opposite to the first side of the second semiconductor substrate;

a third substrate, including:

a third semiconductor substrate;

a third multi-layer wiring layer stacked on the third semiconductor substrate; and

a fourth pad included in the third multi-layer wiring layer,

wherein the first substrate and the second substrate are electrically connected through a direct bonding between the first pad and the second pad, and

wherein the second substrate and the third substrate are electrically connected through a direct bonding between the third pad and the fourth pad;

a through via that electrically connects the second multi-layer wiring layer and the third pad;

a first film including a metal disposed on a second side of the second semiconductor substrate,

wherein the first film forms a Hall accumulation layer, and

wherein at least a portion of the first film is disposed between the third pad and the third semiconductor substrate; and

an oxide film,

wherein the oxide film is disposed between the third substrate and the first film, and

wherein the through via extends through the second semiconductor substrate and through an entire thickness of the first film.

2 . The imaging device according to claim 1 , wherein the first substrate includes a plurality of photodiodes.

3 . The imaging device according to claim 1 , wherein the second substrate includes a first circuit.

4 . The imaging device according to claim 3 , wherein the third substrate includes a second circuit.

5 . The imaging device according to claim 1 , wherein the second substrate is stacked on the first substrate such that the first multi-layer wiring layer and the second multi-layer wiring layer are opposed to each other.

6 . The imaging device according to claim 5 , wherein the second multi-layer wiring layer includes a first wiring, and the second pad is connected to the first wiring by a first via.

7 . The imaging device according to claim 6 , wherein the through via electrically connects a second wiring and the third pad, and wherein the second wiring is disposed in a different layer in the second multi-layer wiring layer than the first wiring.

8 . The imaging device according to claim 7 , wherein the third multi-layer wiring layer includes a third wiring, and the third pad is connected to the third wiring by a second via.

9 . The imaging device according to claim 1 , wherein the second substrate further includes a second film on the second side of the second semiconductor substrate.

10 . The imaging device according to claim 9 , wherein the second film includes SiN, SiO2 or SiON.

11 . The imaging device according to claim 1 , wherein the first film includes at least one of hafnium, aluminum, zirconium, tantalum, titanium, lanthanum or ittorium.

12 . The imaging device according to claim 1 , wherein the first film includes at least one of an oxide of hafnium, aluminum, zirconium, tantalum, titanium, lanthanum or yttrium.

13 . The imaging device according to claim 1 , wherein the first film includes at least tantalum.

14 . The imaging device according to claim 1 , wherein the first film has one of a negative fixed charge or a positive fixed charge.

15 . The imaging device according to claim 1 , further comprising:

a charging film disposed on a surface of the third semiconductor substrate.

16 . The imaging device according to claim 1 , wherein the third pad is formed in the oxide film.