IP Library Granted Patent US 12707747
Granted Patent B2
US 12707747 · App. 18/591,557 · Granted Aug 11, 2026

Image sensor with epitaxial sealing layer for front-side deep trench isolation and manufacturing method thereof

Inventors: Yu-Hung Cheng (Tainan City, TW); Szu-Yu Wang (Hsinchu City, TW); Ching I Li (Tainan City, TW); Yong-Sheng Huang (Taichung City, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10F39/807H10F39/014H10F39/8063
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Quick Facts
Patent No.
US 12707747
App. No.
18/591,557
Granted
Aug 11, 2026
Kind
B2
Abstract

A method includes forming a doped region in a substrate; forming a doped well vertically extending from a front side of the substrate into the doped region; forming a transfer gate over the front side of the substrate and laterally between a first portion of the doped well and a second portion of the doped well; forming a trench vertically extending form the front side of the substrate through the doped well toward a back side of the substrate; depositing an dielectric material over the front side of the substrate and in the trench; recessing the dielectric material; performing a selective epitaxial growth process to form a sealing layer in the trench and over the recessed dielectric material from the front side of the substrate; forming an electrode in the trench and over the sealing layer from the front side of the substrate.

Claims (53)

1 . A method, comprising:

forming a doped region in a semiconductor substrate, wherein the doped region is of a first conductivity type;

forming a doped well vertically extending from a front side of the semiconductor substrate into the doped region, wherein the doped well is of a second conductivity type opposite to the first conductivity type;

forming a transfer gate over the front side of the semiconductor substrate and laterally between a first portion of the doped well and a second portion of the doped well;

forming a trench vertically extending form the front side of the semiconductor substrate through the doped well toward a back side of the semiconductor substrate;

depositing an dielectric material over the front side of the semiconductor substrate and in the trench;

recessing the dielectric material, such that the recessed dielectric material has a top surface lower than the front side of the semiconductor substrate;

performing a selective epitaxial growth process to form a sealing layer in the trench and over the recessed dielectric material from the front side of the semiconductor substrate; and

forming an electrode in the trench and over the sealing layer from the front side of the semiconductor substrate.

2 . The method of claim 1 , wherein the step of recessing the dielectric material comprises:

performing a planarization process to remove the dielectric material located outside the trench; and

after performing the planarization process, performing a dry etching process to recess the dielectric material.

3 . The method of claim 2 , wherein the dry etching process comprises an etchant including C 4 F 8 .

4 . The method of claim 2 , wherein the dry etching process is performed such that the recessed dielectric material has a sharp protrusion on a top thereof.

5 . The method of claim 2 , further comprising:

after performing the dry etching process, performing a pre-clean process on the recessed dielectric material to scale down the sharp protrusion.

6 . The method of claim 5 , wherein the pre-clean process comprises an etchant including HF and NH 3 .

7 . The method of claim 1 , wherein the selective epitaxial growth process comprises a repetitive cycle, and the each cycle comprises an epitaxial deposition step and an annealing step following the epitaxial deposition step.

8 . The method of claim 1 , further comprising:

forming a floating diffusion node in the first portion of the doped well, wherein the electrode is formed in the floating diffusion node.

9 . The method of claim 1 , further comprising:

after forming the electrode, removing the dielectric material in the trench from the back side of the semiconductor substrate to expose the sealing layer;

after removing the dielectric material, forming a high-k dielectric liner lining a sidewall of the trench from the back side of the semiconductor substrate; and

after forming the high-k dielectric liner, forming a dielectric filler in the trench from the back side of the semiconductor substrate to form a deep trench isolation structure.

10 . The method of claim 1 , further comprising:

forming a plurality of micro-lenses over the back side of the semiconductor substrate.

11 . A method, comprising:

forming a doped well vertically extending from a front side of a substrate into the substrate and surrounding a pixel region of an image sensor;

forming a trench vertically extending form the front side of the substrate through the doped well toward a back side of the substrate;

forming a dielectric structure in the trench from the front side of the substrate;

performing a selective epitaxial growth process to form a epitaxial silicon layer in the trench and over a front side of the dielectric structure, wherein the selective epitaxial growth process comprises a repetitive cycle, and the each cycle comprises an epitaxial deposition step and an annealing step following the epitaxial deposition step;

forming a dielectric layer in the trench and over a front side of the epitaxial silicon layer;

forming a polysilicon layer in the trench and over a front side of the dielectric layer; and

replacing the dielectric structure with a deep trench isolation structure from the back side of the substrate.

12 . The method of claim 11 , wherein the epitaxial deposition step in the selective epitaxial growth process is performed at a temperature in a range from about 600 to 900° C.

13 . The method of claim 11 , wherein forming the dielectric structure comprises:

depositing an dielectric material over the front side of the semiconductor substrate and in the trench; and

recessing the dielectric material, such that the recessed dielectric material has a top surface lower than the front side of the semiconductor substrate.

14 . The method of claim 11 , wherein from a top view, the deep trench isolation structure has a grid pattern that has a grid line, and from a cross-sectional view taken along a direction intersecting with a lengthwise direction of the grid line, the epitaxial silicon layer has a flat back-side surface.

15 . The method of claim 11 , wherein from a top view, the deep trench isolation structure has a grid pattern that has a grid line, and from a cross-sectional view taken along a lengthwise direction of the grid line, the epitaxial silicon layer has a convex back-side surface.

16 . The method of claim 11 , wherein the step of replacing the dielectric structure with the deep trench isolation structure comprises:

thinning down the substrate to expose the dielectric structure from the back side of the substrate;

removing the dielectric structure in the trench from the back side of the substrate; and

forming the deep trench isolation structure in the trench.

17 . An image sensor, comprising:

a first conductivity type doped region in a pixel region of a substrate;

a second conductivity type doped well vertically extending from a front side of the substrate into the first conductivity type doped region, wherein from a top view, the second conductivity type doped well laterally surrounds the pixel region;

a deep trench isolation structure in the substrate and laterally surrounding the pixel region, wherein a footprint of the deep trench isolation structure is within a footprint of the second conductivity type doped well;

an epitaxial sealing layer over a front side of the deep trench isolation structure and in the second conductivity type doped well; and

a polysilicon layer over a front side of the epitaxial sealing layer and embedded in the second conductivity type doped well.

18 . The image sensor of claim 17 , wherein the epitaxial sealing layer has a flat back side surface.

19 . The image sensor of claim 17 , wherein the deep trench isolation structure has a flat front side surface.

20 . The image sensor of claim 17 , wherein the deep trench isolation structure has a vertical sidewall wall.