IP Library Granted Patent US 12707762
Granted Patent B2
US 12707762 · App. 17/956,571 · Granted Aug 11, 2026

Methods and devices for solid state nanowire devices

Inventors: Zetian Mi (Verdun, CA); Hieu Pham Trung Nguyen (Montreal, CA); Songrui Zhao (Montreal, CA)
Assignee: The Royal Institution for the Advancement of Learning/McGill University
H10H20/812H10H20/818
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Quick Facts
Patent No.
US 12707762
App. No.
17/956,571
Granted
Aug 11, 2026
Kind
B2
Abstract

Solid state sources offer potential advantages including high brightness, electricity savings, long lifetime, and higher color rendering capability, when compared to incandescent and fluorescent light sources. To date however, many of these advantages have not been borne out in providing white LED lamps for general lighting applications. The inventors have established that surface recombination through non-radiative processes results in highly inefficient electrical injection. Exploiting in-situ grown shells in combination with dot-in-a-wire LED structures to overcome this limitation through the effective lateral confinement offered by the shell, the inventors have demonstrated core-shell dot-in-a-wire LEDs with significantly improved electrical injection efficiency and output power, providing phosphor-free InGaN/GaN nanowire white LEDs operating with milliwatt output power and color rendering indices of 95-98. Additionally, the inventors demonstrate efficient UV nanowire LEDs for medical applications as well as the non-degraded growth of nanowire LEDs on amorphous substrates.

Claims (34)

1 . A device, comprising:

a substrate;

a plurality of nanowires coupled to the substrate, wherein each nanowire of the plurality of nanowires comprises:

a lower nanowire portion comprising a first n-type semiconductor including a group III element, wherein a face of a first surface of the lower nanowire portion is disposed on the substrate;

a central nanowire portion comprising a plurality of quantum structures, wherein the central nanowire portion is disposed on a face of a second surface of the lower nanowire portion opposite the face of the first surface of the lower nanowire portion; and

an upper nanowire portion, disposed on the central nanowire portion opposite the lower nanowire portion, comprising a first p-type semiconductor including the group III element; and

a respective outer nanowire shell coupled to a periphery of said each nanowire and encompassing respective peripheries of the lower nanowire portion, the central nanowire portion, and the upper nanowire portion, wherein each said respective outer nanowire shell has a thickness that increases with increasing distance from the substrate.

2 . The device of claim 1 , wherein a first nanowire of the plurality of nanowires is separated from a second nanowire of the plurality of nanowires by the respective outer nanowire shell of the first nanowire and the respective outer nanowire shell of the second nanowire.

3 . The device of claim 1 , wherein each said respective outer nanowire shell comprises a semiconductor that has a bandgap that is larger than a bandgap of the plurality of quantum structures of the central nanowire portion.

4 . The device of claim 1 , wherein the plurality of quantum structures comprises a quantum structure selected from a group consisting of: a quantum dot; a quantum well; and a quantum dot within a quantum dot.

5 . The device of claim 1 , wherein the lower nanowire portion and the upper nanowire portion of said each nanowire comprise wurtzite semiconductors.

6 . The device of claim 1 , wherein the quantum structures comprise p-type quantum structures.

7 . The device of claim 1 , wherein the lower nanowire portion and the upper nanowire portion of said each nanowire comprise binary semiconductors, and wherein each said respective outer nanowire shell comprises a ternary semiconductor.

8 . The device of claim 1 , further comprising an electron blocking layer incorporated in the central nanowire portion of said each nanowire.

9 . The device of claim 1 , further comprising an electrical conductor in contact with the upper nanowire portion of said each nanowire.

10 . The device of claim 1 , further comprising a layer of polyimide adjacent to each said respective outer nanowire shell, wherein the layer of polyimide extends from the substrate to the upper nanowire portion of said each nanowire.

11 . The device of claim 1 , wherein the respective outer nanowire shell of said each nanowire is in contact with the substrate and extends along an entire length of said each nanowire.

12 . The device of claim 8 , wherein the electron blocking layer comprises aluminum gallium nitride.

13 . A device, comprising:

a nanowire disposed on a substrate, wherein the nanowire comprises a plurality of regions including a p-doped region, an active region, an n-doped region and a shell region;

wherein the active region is disposed between the p-doped region and the n-doped region along a longitudinal axis and in a cross section of the nanowire, wherein the p-doped region is disposed along a first lengthwise portion of the nanowire, the first lengthwise portion being distal to the substrate and the n-doped region is disposed along a second lengthwise portion of the nanowire the second lengthwise portion being adjacent to the substrate, opposite the first lengthwise portion, and wherein the active region includes a plurality of quantum structures such that the quantum structures are embedded in the active region; and

wherein the shell region surrounds a periphery of each of the p-doped region, the active region and the n-doped region, and the shell region has a thickness that continuously increases along the entire periphery of the n-doped region, the active region and the p-doped region in a vertical direction with increasing distance from the substrate.

14 . The device of claim 13 , wherein the shell region comprises a semiconductor that has a bandgap that is larger than a bandgap of a semiconductor of one or more of the p-doped region, the active region and the n-doped region.

15 . The device of claim 13 , wherein the active region comprises a quantum structure selected from a group consisting of a quantum dot; a quantum well; and a quantum dot within a quantum dot.

16 . The device of claim 13 , wherein the active region comprises a p-doped semiconductor.

17 . The device of claim 13 , wherein the p-doped region and the n-doped region comprise binary semiconductors, and wherein the shell region comprises a ternary semiconductor.

18 . The device of claim 13 , further comprising an electron blocking layer in the active region.

19 . The device of claim 13 , further comprising:

an electrical conductor in contact with a first end of the nanowire; and

a substrate in contact with a second end of the nanowire.

20 . The device of claim 13 , further comprising a layer of polyimide adjacent to the shell region.

21 . The device of claim 13 , wherein the nanowire comprises a wurtzite semiconductor.

22 . The device of claim 13 , wherein the p-doped region, the active region, and the n-doped region comprise gallium nitride, and the shell region comprises aluminum gallium nitride.

23 . The device of claim 13 , wherein the active region comprises an intrinsic semiconductor.