IP Library Granted Patent US 12707903
Granted Patent B2
US 12707903 · App. 17/625,968 · Granted Aug 11, 2026

Heat dissipation in resistive memories

Inventors: Mohammad Shah Al-Mamun (Blacksburg, VA); Marius Orlowski (Pembroke, VA)
Assignee: VIRGINIA TECH INTELLECTUAL PROPERTIES, INC.
H10N70/8613H10B63/80H10N70/011
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Quick Facts
Patent No.
US 12707903
App. No.
17/625,968
Filed
Jan 10, 2022
Granted
Aug 11, 2026
Kind
B2
Art Unit
2812
USPC
257/5
Abstract

A semiconductor memory device designed to mitigate degradation due to heat, and methods of forming such a device, are described. In one example, a memory cell in a memory device includes an insulating layer formed over a substrate, a horizontal crossbar electrode formed over the insulating layer, a metal oxide resistive memory layer formed over the horizontal crossbar electrode, and a vertical crossbar electrode formed over the resistive switching memory layer. In one aspect of the embodiments, the horizontal crossbar electrode includes a thermally conductive horizontal crossbar layer formed over the insulating layer and a platinum horizontal crossbar electrode formed over the thermally conductive horizontal crossbar layer. The thermally conductive horizontal crossbar layer can be a layer of copper for thermal dissipation of heat away from the memory cell during set and reset operations, reducing degradation in the memory device.

Claims (14)

1 . A semiconductor memory device, comprising:

a substrate;

an insulating layer formed over the substrate;

a thermally conductive horizontal crossbar layer of copper formed at a first thickness over the insulating layer for thermal dissipation of heat horizontally away from a memory cell during set and reset operations of the memory cell;

a horizontal crossbar electrode of platinum formed on the thermally conductive horizontal crossbar layer at a second thickness less than the first thickness;

a resistive switching memory layer for the memory cell formed over the horizontal crossbar electrode of platinum, the resistive switching memory layer comprising tantalum oxide;

a vertical crossbar electrode formed at a third thickness over the resistive switching memory layer; and

a thermally conductive vertical crossbar layer of copper formed at a fourth thickness different than the third thickness over the vertical crossbar electrode for thermal dissipation of heat vertically away from the memory cell during the set and reset operations of the memory cell, wherein:

the thermally conductive vertical crossbar layer comprises copper and a graphene layer for thermal dissipation.

2 . The semiconductor memory device according to claim 1 , wherein:

the first thickness is between 100-350 nm and the second thickness is 50 nm; and

the third thickness is 50 nm and the fourth thickness is between 100-350 nm.

3 . The semiconductor memory device according to claim 1 , wherein the thermally conductive vertical crossbar layer is formed on the vertical crossbar electrode.

4 . The semiconductor memory device according to claim 3 , wherein the vertical crossbar electrode comprises one of a silver, nickel, tantalum nitride, or tantalum layer formed at the third thickness on the resistive switching memory layer.