IP Library Granted Patent US 12707940
Granted Patent B2
US 12707940 · App. 17/650,723 · Granted Aug 11, 2026

Defect inspection system employing an image enhancing model and a defect detection model, and method of using the same

Inventors: Chih-Kai Yang (Taipei, TW); Tung-Chin Wu (Hsinchu, TW); Yu-Tien Shen (Tainan, TW); Hsiang Ming Chang (Hsinchu, TW); Chun-Yen Chang (Hsinchu, TW); Ya Hui Chang (Hsinchu, TW); Zengqin Zhao (Zhubei, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H10P74/203G01N21/9501G06T1/0007G06T7/0006H10P14/61G01N2021/8887G06T2207/20081G06T2207/30148
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12707940
App. No.
17/650,723
Granted
Aug 11, 2026
Kind
B2
Abstract

A method includes patterning a hard mask over a target layer, capturing a low resolution image of the hard mask, and enhancing the low resolution image of the hard mask with a first machine learning model to produce an enhanced image of the hard mask. The method further includes analyzing the enhanced image of the hard mask with a second machine learning model to determine whether the target layer has defects.

Claims (70)

1 . A method comprising:

patterning a hard mask over a target layer;

capturing a low resolution image of the hard mask;

enhancing the low resolution image of the hard mask with a pre-trained machine learning model to produce an enhanced resolution image of the hard mask, wherein the pre-trained machine learning model is trained by iteratively performing the following steps to generate the enhanced resolution image

generating an upscaled image of a low resolution image using a neural network,

comparing the upscaled image to a high resolution image corresponding to the low resolution image to generate an error function,

tuning parameters of the neural network based on a value of the error function, and

regenerating the upscaled image using parameters tuned by the tuning step, and

comparing the regenerated upscaled image to the high resolution image corresponding to the low resolution image to regenerate the error function,

storing the upscaled image as an enhanced resolution image in an enhanced resolution image database in response to determining the error function is below a pre-determined threshold;

analyzing the enhanced resolution image of the hard mask with a second machine learning model to determine whether the target layer has defects; and

transferring the pattern of the hard mask to the target layer to form semiconductor fins extending from a semiconductor substrate.

2 . The method of claim 1 , further comprising analyzing the enhanced resolution image of the hard mask with a second pre-trained machine learning model to determine whether the target layer has defects, wherein the second pre-trained machine learning model is trained by

performing a defect detection analysis on the enhanced resolution image to generate a first result, using a neural network,

performing the defect detection analysis on a high resolution image corresponding to the enhanced resolution image to generate a second result, using the neural network,

comparing the first result with the second result to generate an error function,

tuning parameters of the neural network based upon a value of the error function,

re-performing the defect detection analysis on the enhanced resolution image to regenerate the first result,

re-comparing the regenerated first result with the second result to regenerate the error function, and

completing training of the second pre-trained machine learning model when the regenerated error function has a value below a threshold value.

3 . The method of claim 1 , further comprising halting further processing in response to determining the target layer contains defects.

4 . The method of claim 1 , wherein the target layer is part of a first semiconductor wafer, the method further comprising:

capturing low resolution images and high resolution images of a second semiconductor wafer, the second semiconductor wafer different from the first semiconductor wafer; and

training the machine learning model and the second machine learning model with the low resolution images and the high resolution images.

5 . The method of claim 1 , wherein the defects are pattern bridging defects in a pattern of the hard mask.

6 . A method comprising:

capturing a first low resolution image and a first high resolution image of a target layer formed on a semiconductor wafer;

training an image enhancing model with the first low resolution image and the first high resolution image, the image enhancing model configured to increase resolution of an image, wherein the image enhancing model is trained by iteratively performing the following steps to generate an enhanced resolution image,

generating an upscaled image of the first low resolution image using a neural network,

comparing the upscaled image to a high resolution image corresponding to the low resolution image to generate an error function,

tuning parameters of the neural network based on a value of the error function, and

regenerating the upscaled image using parameters tuned by the tuning step;

after training the image enhancing model, capturing a second low resolution image of a second target layer formed on a second semiconductor wafer;

enhancing the second low resolution image of the second target layer with the image enhancing model to produce an enhanced resolution image of the second target layer;

training a defect detection model with a second high resolution image and the enhanced resolution image of the second target layer, wherein the defect detection model is trained by

performing a defect detection analysis on the enhanced resolution image to generate a first result, using a neural network,

performing the defect detection analysis on a high resolution image corresponding to the enhanced resolution image to generate a second result, using the neural network,

comparing the first result with the second result to generate an error function,

tuning parameters of the neural network based upon a value of the error function,

re-performing the defect detection analysis on the enhanced resolution image to regenerate the first result,

re-comparing the regenerated first result with the second result to regenerate the error function, and

completing training of the defect detection model when the regenerated error function has a value below a threshold value;

analyzing the enhanced resolution image of the second target layer with the defect detection model to determine whether the second semiconductor wafer has defects;

performing one or more semiconductor processes on the second target layer in response to determining the second target layer is free of defects; and

halting further processing on the second target layer in response to determining the second target layer has defects.

7 . The method of claim 6 , wherein the step of performing one or more semiconductor processes on the second target layer includes transferring a pattern from a patterned hard mask overlying the second target layer to the second target layer to form semiconductor fins extending from the second semiconductor wafer.

8 . The method of claim 6 , wherein the defect detection model is trained using a convolutional neural network with the first low resolution images and the first high resolution images.

9 . The method of claim 6 , wherein the defects are pattern bridging defects between conductive lines.

10 . The method of claim 6 , wherein the second semiconductor wafer comprises a hard mask layer over a substrate, the method further comprising:

before capturing the second low resolution images of the second semiconductor wafer, patterning the hard mask layer to form the patterned hard mask.

11 . The method of claim 10 , wherein the second low resolution images are images of the patterned hard mask.

12 . The method of claim 11 , further comprising transferring a pattern of the patterned hard mask to the substrate by etching the second target layer.

13 . An apparatus comprising:

a processing tool configured to perform a semiconductor process on a semiconductor wafer;

a camera configured to capture a low resolution image of a patterned hard mask formed on a target layer over the semiconductor wafer; and

a controller, the controller including computer-readable non-transitory memory containing instructions to:

receive the low resolution images of the patterned hard mask from the camera;

enhance the low resolution image of the hard mask with a machine learning model to produce an enhanced resolution image of the hard mask, wherein the machine learning model is trained by iteratively performing the following steps to generate the enhanced resolution image

generating an upscaled image of a low resolution image using a neural network,

comparing the upscaled image to a high resolution image corresponding to the low resolution image to generate an error function,

tuning parameters of the neural network based on a value of the error function, and

regenerating the upscaled image using parameters tuned by the tuning step, and

comparing the regenerated upscaled image to the high resolution image corresponding to the low resolution image to regenerate the error function,

storing the upscaled image as an enhanced resolution image in an enhanced resolution image database in response to determining the error function is below a pre-determined threshold;

analyze the enhanced resolution images of the semiconductor wafer with a second machine learning model to determine whether the semiconductor wafer has defects; and

control the processing tool to take steps to form fins on the semiconductor wafer in response to determining the semiconductor wafer is free of defects.

14 . The apparatus of claim 13 , wherein the controller is configured to enhance the low resolution images of the semiconductor wafer with a generative adversarial network.

15 . The apparatus of claim 13 , wherein the controller is configured to analyze the enhanced resolution images of the semiconductor wafer with a convolutional neural network.

16 . The apparatus of claim 13 , wherein the processing tool is configured to pattern the hard mask over a target layer on the semiconductor wafer.

17 . The apparatus of claim 16 , wherein the controller is configured to control the processing tool to perform the semiconductor process by controlling the processing tool to transfer the pattern of the first hard mask to the target layer in response to determining the semiconductor wafer is free of defects.