IP Library Granted Patent US 12707941
Granted Patent B2
US 12707941 · App. 17/744,383 · Granted Aug 11, 2026

Bonding surface validation on dicing tape

Inventors: Cyprian Emeka Uzoh (San Jose, CA); Oliver Zhao (Sunnyvale, CA)
Assignee: Adeia Semiconductor Bonding Technologies Inc.
H10P74/203H10P54/00H10P72/7402
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Quick Facts
Patent No.
US 12707941
App. No.
17/744,383
Filed
May 13, 2022
Granted
Aug 11, 2026
Kind
B2
Art Unit
2815
USPC
438/14
Abstract

The disclosed technology relates to methods for forming and/or validating bonding surfaces of integrated device dies mounted on a dicing tape, and dicing tapes used thereof. In some embodiments, such a method for forming and validating a microelectronic assembly may include mounting a substrate to a dicing tape; singulating the substrate while the substrate is mounted to the dicing tape to form a plurality of dies; and validating a bonding surface of at least one die of the plurality of dies while the at least one die is mounted to the dicing tape. In some embodiments, such a dicing tape may include an anti-static adhesive layer arranged on an anti-static base film.

Claims (27)

1 . A method of forming a microelectronic assembly, comprising:

mounting a substrate to an anti-static dicing tape, the anti-static dicing tape comprising an anti-static adhesive layer; and

singulating through the substrate and partially through the anti-static adhesive layer to form a plurality of dies.

2 . The method of claim 1 , further comprising planarizing the substrate before mounting the substrate to the anti-static dicing tape.

3 . The method of claim 1 , further comprising preparing bonding surfaces of the plurality of dies while the plurality of dies are mounted to the anti-static dicing tape, including activating the bonding surfaces of the plurality of dies.

4 . The method of claim 1 , further comprising picking up at least one die from the anti-static dicing tape and directly bonding the at least one die to an element without an intervening adhesive.

5 . The method of claim 1 , wherein the anti-static dicing tape comprises an ultraviolet (UV)-sensitive or pressure-sensitive adhesive layer.

6 . The method of claim 1 , further comprising

validating a bonding surface of at least one die of the plurality of dies while the at least one die is mounted to the anti-static dicing tape.

7 . The method of claim 6 , further comprising electrically grounding the anti-static dicing tape during validation of the bonding surface of the at least one die.

8 . The method of claim 6 , wherein validating the bonding surface of the at least one die comprises measuring a conductive pad recess of the bonding surface of the at least one die by a metrological device.

9 . The method of claim 6 , wherein validating the bonding surface of the at least one die comprises measuring a surface roughness of the bonding surface of the at least one die by a metrological device.

10 . The method of claim 1 , wherein singulating through the substrate comprises partially dicing through a conductive region of the anti-static dicing tape.

11 . The method of claim 1 , wherein the thickness of the anti-static adhesive layer is greater than 10 μm.

12 . A method of forming a microelectronic assembly, comprising:

mounting a substrate to an anti-static dicing tape, the anti-static dicing tape comprising an anti-static adhesive layer;

singulating through the substrate and partially through the anti-static adhesive layer to form a plurality of dies; and

validating a bonding surface of at least one die of the plurality of dies while the at least one die is mounted to the anti-static dicing tape.

13 . The method of claim 12 , wherein singulating through the substrate comprises partially dicing through a conductive region of the anti-static dicing tape.

14 . The method of claim 12 , further comprising electrically grounding the anti-static dicing tape during validation of the bonding surface of the at least one die.

15 . The method of claim 12 , wherein validating the bonding surface of the at least one die comprises measuring a conductive pad recess of the bonding surface of the at least one die by a metrological device.

16 . The method of claim 12 , wherein validating the bonding surface of the at least one die comprises measuring a surface roughness of the bonding surface of the at least one die by a metrological device.

17 . A method of forming a microelectronic assembly, comprising:

mounting a substrate to an anti-static dicing tape, the anti-static dicing tape comprising an anti-static adhesive layer;

singulating through the substrate and partially through the anti-static adhesive layer to form a plurality of dies, wherein singulating through the substrate comprises partially dicing through a conductive region of the anti-static dicing tape.

18 . The method of claim 17 , further comprising validating a bonding surface of at least one die of the plurality of dies while the at least one die is mounted to the anti-static dicing tape.

19 . The method of claim 18 , further comprising electrically grounding the anti-static dicing tape during validation of the bonding surface of the at least one die.