IP Library Granted Patent US 12707949
Granted Patent B2
US 12707949 · App. 17/940,158 · Granted Aug 11, 2026

Memory device

Inventors: Natsuki Fukuda (Yokkaichi, JP); Tadashi Iguchi (Yokkaichi, JP)
Assignee: Kioxia Corporation
H10W20/20H10B43/27
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12707949
App. No.
17/940,158
Granted
Aug 11, 2026
Kind
B2
Abstract

Contact plugs extend along a first axis. Each contact plug includes a second conductor and a first insulator. A first insulator is between the first conductors and the second conductor. A lower face of each contact plug is in contact with an upper face of a unique one of the first conductors. A first one and second one of the contact plugs are adjacent along a second axis that crosses the first axis. A third one of the contact plugs is between the first and second contact plugs on the second axis, and is at a different position from positions of the first and second contact plugs on a third axis orthogonal to the first and second axes.

Claims (48)

1 . A memory device comprising:

a plurality of first conductors that are arranged along a first axis at intervals;

a memory pillar that extends along the first axis, faces the plurality of first conductors, and includes a semiconductor and a film that surrounds the semiconductor; and

a plurality of contact plugs that extend along the first axis, wherein

each of the contact plugs includes a second conductor and a first insulator that surrounds the second conductor,

the first insulator is located between the plurality of first conductors and the second conductor,

a lower face of each of the contact plugs is in contact with an upper face of a unique one of the plurality of first conductors,

the contact plugs include a first contact plug, a second contact plug, a third contact plug, a fifth contact plug, and a sixth contact plug,

the first contact plug and the second contact plug are disposed along a second axis to be adjacent to each other, the second axis crossing the first axis,

the fifth contact plug and the sixth contact plug are disposed along the second axis to be adjacent to each other,

the first contact plug and the fifth contact plug are disposed along a third axis to be adjacent to each other, the third axis being orthogonal to the first axis and the second axis,

the second contact plug and the sixth contact plug are disposed along the third axis, and

the third contact plug is located between the first contact plug and the second contact plug on the second axis and between the fifth contact plug and the sixth contact plug on the second axis, and is disposed in a different position from positions of the first contact plug, the second contact plug, fifth contact plug, and the sixth contact plug on the third axis,

wherein

each of the contact plugs has a hexagonal shape along a first plane including the second axis and the third axis,

the memory device further includes a plurality of insulators that extend along the first axis, and penetrate the plurality of first conductors,

the insulators are located in an area that deviates from a center of a shape of each of the contact plugs,

one of the insulators at least partly overlaps with one of the contact plugs along the first plane, and

one of the insulators at least partly overlaps with a vertex of the one of the contact plugs along the first plane.

2 . The memory device according to claim 1 , wherein

the contact plugs further include a fourth contact plug,

the third contact plug and the fourth contact plug are disposed along the second axis to be adjacent to each other, and

the second contact plug is located between the third contact plug and the fourth contact plug on the second axis.

3 . The memory device according to claim 1 , further comprising:

a second insulator that extends along the first axis, includes an upper end that is located above an uppermost of the plurality of first conductors, and includes a lower end that is in contact with lowermost one of the plurality of first conductors; and

a plurality of third insulators that extend along the first axis, includes an upper end that is in contact with a lower face of one of the contact plugs, and includes a lower end that is in contact with the lowermost one of the plurality of first conductors, the third insulators being located in an area that deviates from a center of a shape of each of the contact plugs.

4 . The memory device according to claim 3 , wherein

one of the third insulators at least partly overlaps with one of the contact plugs along the first plane.

5 . A memory device comprising:

a plurality of first conductors that are arranged along a first axis at intervals;

a memory pillar that extends along the first axis, faces the plurality of first conductors, and includes a semiconductor and a film that surrounds the semiconductor; and

a plurality of contact plugs that extend along the first axis, wherein

each of the contact plugs includes a second conductor and a first insulator that surrounds the second conductor,

the first insulator is located between the plurality of first conductors and the second conductor,

a lower face of each of the contact plugs is in contact with an upper face of a unique one of the plurality of first conductors,

the contact plugs include a first contact plug, a second contact plug, a third contact plug, a fifth contact plug, and a sixth contact plug,

the first contact plug and the second contact plug are disposed along a second axis to be adjacent to each other, the second axis crossing the first axis,

the fifth contact plug and the sixth contact plug are disposed along the second axis to be adjacent to each other,

the first contact plug and the fifth contact plug are disposed along a third axis to be adjacent to each other, the third axis being orthogonal to the first axis and the second axis,

the second contact plug and the sixth contact plug are disposed along the third axis, and

the third contact plug is located between the first contact plug and the second contact plug on the second axis and between the fifth contact plug and the sixth contact plug on the second axis, and is disposed in a different position from positions of the first contact plug, the second contact plug, fifth contact plug, and the sixth contact plug on the third axis,

wherein

each of the contact plugs has a hexagonal shape along a first plane including the second axis and the third axis,

the memory device further comprises:

a second insulator that extends along the first axis, includes an upper end that is located above an uppermost of the plurality of first conductors, and includes a lower end that is in contact with lowermost one of the plurality of first conductors; and

a plurality of third insulators that extend along the first axis, includes an upper end that is in contact with a lower face of one of the contact plugs, and includes a lower end that is in contact with the lowermost one of the plurality of first conductors, the third insulators being located in an area that deviates from a center of a shape of each of the contact plugs

one of the third insulators at least partly overlaps with one of the contact plugs along the first plane, and

one of the third insulators at least partly overlaps with a vertex of the one of the contact plugs along the first plane.