Integrated circuit packages and methods of forming the same
Embodiments include a crack stopper structure surrounding an embedded integrated circuit die, and the formation thereof. The crack stopper structure may include multiple layers separated by a fill layer. The layers of the crack stopper may include multiple sublayers, some of the sublayers providing adhesion, hardness buffering, and material gradients for transitioning from one layer of the crack stopper structure to another layer of the crack stopper structure.
1 . A device comprising:
a first device tier, the first device tier including a first integrated circuit die, a first dielectric structure laterally surrounding the first integrated circuit die, and a first gap-filling dielectric laterally surrounding the first dielectric structure, the first dielectric structure including at least two dielectric material layers distinct from the first gap-filling dielectric, wherein the first dielectric structure includes a first layer, a second layer, and a first dielectric film between the first layer and the second layer, the first dielectric film having a same material composition as the first gap-filling dielectric, wherein the second layer includes a first sub-layer and a second sub-layer, the second sub-layer interposed between the first gap-filling dielectric and the first sub-layer, the first sub-layer having a first hardness, the first gap-filling dielectric having a second hardness less than the first hardness, and the second sub-layer having a third hardness between the first hardness and the second hardness;
a second device tier, the second device tier including a second integrated circuit die, a second dielectric structure laterally surrounding the second integrated circuit die, and a second gap-filling dielectric laterally surrounding the second dielectric structure, the second integrated circuit die bonded in a face-to-back manner to the first integrated circuit die; and
a support substrate attached to the second integrated circuit die.
2 . The device of claim 1 , wherein the second layer further includes a third sub-layer, the third sub-layer interposed between the first sub-layer and the first dielectric film, the third sub-layer having a same material composition as the second sub-layer.
3 . The device of claim 1 , wherein the first layer of the first dielectric structure has a thickness 2 to 3 times greater than a thickness of the second layer of the first dielectric structure.
4 . The device of claim 1 , further comprising a third integrated circuit die disposed in the first device tier, the third integrated circuit die adjacent to the first integrated circuit die, wherein the second integrated circuit die spans over both the first integrated circuit die and the third integrated circuit die.
5 . The device of claim 1 , wherein an upper surface of the first layer is level with an upper surface of the second layer.
6 . A device comprising:
a first die, the first die laterally surrounded by a first dielectric material layer;
a second dielectric material layer laterally surrounding the first dielectric material layer; and
a dielectric fill material laterally surrounding the second dielectric material layer, the first dielectric material layer having a same material composition as the dielectric fill material, the second dielectric material layer having a different material composition than the dielectric fill material, wherein an upper surface of the dielectric fill material is level with an upper surface of the first dielectric material layer, wherein a bottom surface of the dielectric fill material is level with a bottom surface of the first dielectric material layer.
7 . The device of claim 6 , wherein the second dielectric material layer includes:
a first sub-layer comprising a first elemental composition, wherein the dielectric fill material comprises a second elemental composition; and
a second sub-layer comprising each element of the first elemental composition and the second elemental composition combined.
8 . The device of claim 7 , wherein the second dielectric material layer includes:
a third sub-layer comprising a third elemental composition, wherein the third elemental composition comprises each element of the first elemental composition and each element of the second elemental composition combined.
9 . The device of claim 6 , further comprising:
a third dielectric material layer laterally surrounding the first die, wherein the third dielectric material layer is between the first dielectric material layer and the first die.
10 . The device of claim 9 , wherein the third dielectric material layer and the second dielectric material layer are formed of a same material.
11 . The device of claim 9 , further comprising:
a fourth dielectric material layer laterally surrounding the first die, wherein the fourth dielectric material layer is between the third dielectric material layer and the first die; and
a fifth dielectric material layer laterally surrounding the first die, wherein the fifth dielectric material layer is between the fourth dielectric material layer and the first die.
12 . The device of claim 11 , wherein the fourth dielectric material layer and the first dielectric material layer are formed of a same material.
13 . The device of claim 12 , wherein the fifth dielectric material layer, the third dielectric material layer, and the second dielectric material layer are formed of a same material.
14 . The device of claim 6 , wherein the first die includes a conductive feature protruding from a semiconductor substrate, and further comprising:
an insulating layer over the semiconductor substrate of the first die and over the dielectric fill material, wherein the insulating layer extends along sidewalls of the conductive feature.
15 . A device comprising:
a first die mounted on a first substrate, wherein the first die comprises a semiconductor substrate and a conductive feature protruding from a first surface of the semiconductor substrate;
a first dielectric material layer on a sidewall of the first die and over the first substrate;
a second dielectric material layer over the first dielectric material layer;
a third dielectric material layer over the second dielectric material layer;
a dielectric fill material over the third dielectric material layer, the second dielectric material layer having a same material composition as the dielectric fill material, the third dielectric material layer having a different material composition than the dielectric fill material, a first surface of the dielectric fill being opposite from and facing away from the first substrate; and
an insulating layer over the first surface of the semiconductor substrate of the first die and over the first surface of the dielectric fill material, wherein the insulating layer extends along sidewalls of the conductive feature.
16 . The device of claim 15 , wherein sidewalls of the first dielectric material layer, the second dielectric material layer, the third dielectric material layer and the dielectric fill material are coterminous.
17 . The device of claim 15 , wherein the third dielectric material layer includes:
a first sub-layer; and
a second sub-layer, the second sub-layer interposed between the dielectric fill material and the first sub-layer, the first sub-layer having a first hardness, the second sub-layer having a second hardness, the first hardness being greater than the second hardness.
18 . The device of claim 17 , wherein the dielectric fill material has a third hardness, the second hardness being greater than the third hardness.
19 . The device of claim 15 , wherein the first dielectric material layer has a thickness 1 to 3 times greater than a thickness of the third dielectric material layer.
20 . The device of claim 15 , wherein an upper surface of the dielectric fill material is level with an upper surface of the first dielectric material layer, wherein a bottom surface of the dielectric fill material is level with a bottom surface of the first dielectric material layer.