IP Library Granted Patent US 12707996
Granted Patent B2
US 12707996 · App. 17/873,909 · Granted Aug 11, 2026

Semiconductor device module comprising flexible leads for the purpose of height adjustment

Inventors: Andreas Grassmann (Regensburg, DE); Edward Fuergut (Dasing, DE); Uwe Schindler (Reichenbach, DE)
Assignee: Infineon Technologies AG
H10W70/479H10W40/228H10W70/65H10W74/111H10W90/00H10W90/701
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Quick Facts
Patent No.
US 12707996
App. No.
17/873,909
Granted
Aug 11, 2026
Kind
B2
Abstract

A semiconductor device module includes an application board, a plurality of semiconductor device packages disposed on the application board, each one of the semiconductor device packages including a semiconductor die, a leadframe including a plurality of leads, the leads including a spring support and a heat dissipation element, and an encapsulant embedding the semiconductor die and first portions of the leads, an external heatsink, and one or more thermally conductive interface layers disposed between the semiconductor device package and the heatsink.

Claims (28)

1 . A semiconductor device module, comprising:

an application board;

a plurality of semiconductor device packages disposed on the application board, each one of the semiconductor device packages comprising a semiconductor die, a leadframe comprising a plurality of leads that each comprise a spring support, a heat dissipation element, and an encapsulant embedding the semiconductor die and first portions of the leads;

an external heatsink; and

one or more thermally conductive interface layers disposed between the semiconductor device package and the heatsink,

wherein the spring support is induced or enhanced by two or more recesses formed in second portions of the leads which second portions are not embedded by the encapsulant.

2 . The semiconductor device module according to claim 1 , wherein an interface layer of the one or more thermally conductive interface layers is directly attached to an upper main face of the semiconductor device package and directly attached to a lower main face of the heatsink.

3 . The semiconductor device module according to claim 2 , wherein the interface layer comprises a compressibility of less than 10% or less than 8% or less than 5%.

4 . The semiconductor device module according to claim 1 , wherein the heat dissipation element is exposed by the encapsulant.

5 . The semiconductor device module according to claim 1 , wherein the heat dissipation element comprises a die carrier or a clip.

6 . The semiconductor device module according to claim 2 , wherein the interface layer comprises one common interface layer which is disposed between each one of the semiconductor device packages and the heatsink.

7 . The semiconductor device module according to claim 1 , wherein the one or more thermally conductive interface layers comprises a plurality of interface layers wherein each one of the interface layers from the plurality is disposed between one of the semiconductor device packages and the heatsink.

8 . The semiconductor device module according to claim 1 , wherein the one or more thermally conductive interface layers are electrically insulating.

9 . The semiconductor device module according to claim 1 , wherein the one or more thermally conductive interface layers comprise a material which comprises one or more elements out of a group consisting of a plastic, a silicone, a polyimide, a resin, and an epoxy resin.

10 . The semiconductor device module according to claim 1 , wherein the one or more interface layers comprise a material matrix filled with filler particles, in particular filler particles comprising at least one of the group consisting of metal oxide, aluminum oxide, metal nitride, silicon oxide, boron nitride, zirconium oxide, silicon nitride, diamond, and aluminum nitride.

11 . The semiconductor device module according to claim 1 , wherein the leads are formed as J-leads, gull wing leads, or through-hole leads.

12 . A semiconductor device package comprising:

a semiconductor die

a leadframe comprising a plurality of leads;

a heat dissipation element; and

an encapsulant embedding the semiconductor die and first portions of the leads; wherein

two or more recesses are formed in second portions of the leads which second portions are not embedded by the encapsulant, the recesses being configured to induce or enhance a spring support of the leads.

13 . The semiconductor device package according to claim 12 , wherein the leads are formed as gull wing leads, J-leads, or through-hole leads.

14 . The semiconductor device package according to claim 12 , wherein each one of the leads is formed as a gull wing lead and comprises a first recess which comprises the form of a groove located on an upper surface of an upper horizontal portion of the lead and a second recess which comprises the form of a groove located on a lower surface of a bent portion between the upper horizontal portion and a downward portion of the lead.

15 . The semiconductor device package according to claim 12 , wherein each one of the leads is formed as a J-lead and comprises a first recess which comprises the form of a groove located on an upper surface of an upper horizontal portion of the lead and a second recess which comprises the form of a groove located on a lower surface of the upper horizontal portion of the lead.

16 . The semiconductor device package according to claim 12 , wherein a lowermost surface of the leads lies in a plane which is located below a lowermost surface of the encapsulant.

17 . The semiconductor device package according to claim 12 , wherein the heat dissipation element is exposed by the encapsulant.

18 . The semiconductor device package according to claim 12 , wherein the heat dissipation element comprises a die pad or a clip.