IP Library Granted Patent US 12708019
Granted Patent B2
US 12708019 · App. 17/919,645 · Granted Aug 11, 2026

Passing signals through micro device sidewalls

Inventor: Gholamreza Chaji (Waterloo, CA)
Assignee: VueReal Inc.
H10W72/90H10W70/60H10W70/65H10W70/654H10W72/923H10W72/932H10W72/934H10W72/942
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Quick Facts
Patent No.
US 12708019
App. No.
17/919,645
Granted
Aug 11, 2026
Kind
B2
Abstract

The present invention relates to structure and formation of side walls in micro devices. The structure allows access of one side of the micro device to another side through conductive layers and pads. In particular, the top and bottom sides of the micro devices are in direction of the current in the device and sidewalls are isolation surfaces surrounding the top and bottom sides of the device.

Claims (38)

1 . A micro device structure comprising:

a micro device comprising:

stacked layers comprising functional active, doped and blocking layers;

a sidewall of the micro device directly covered with a first dielectric layer;

a first conductive layer directly covering the first dielectric layer on the sidewall;

the first conductive layer directly overlying a top surface of the micro device thereby electrically coupling the first conductive layer to the top surface of the micro device;

a second conductive layer overlying a bottom surface of the micro device and electrically coupling the first conductive layer, thereby electrically coupling the top surface and the bottom surface of the micro device; and

a second dielectric layer directly overlying the bottom surface of the micro device and having a VIA for accessing the bottom surface of the micro device.

2 . The micro device structure of claim 1 , wherein the second conductive layer is separated from the bottom surface of the micro device by the second dielectric layer.

3 . The micro device structure of claim 2 , wherein the first and second conductive layers go around the micro device.

4 . The micro device structure of claim 3 , wherein other dielectric layers are disposed on top of the first and second conductive layers.

5 . The micro device structure of claim 1 , wherein a third conductive layer is coupled to the bottom surface of the micro device through the VIA.

6 . The micro device structure of claim 5 , wherein the third conductive layer is in part separated from the bottom surface of the micro device by the second dielectric layer.

7 . The micro device structure of claim 5 further comprising, pads coupled to each of the second and third conductive layers.

8 . The micro device structure of claim 1 , wherein the first conductive layer covers at least part of the sidewall and is extended over the first dielectric layer at least in one area.

9 . The micro device structure of claim 8 , comprising pads on top of the first conductive layer and a fourth conductive layer.

10 . The micro device structure of claim 9 , wherein at least one of the first conductive layer and the fourth conductive layer and a pad are the same.

11 . The micro device structure of claim 9 , wherein the first conductive layer is connected to the bottom surface of the micro device through a fifth conductive layer which is coupled to the bottom surface of the micro device.

12 . The micro device structure of claim 11 , wherein other dielectric layers cover the first and fifth conductive layers.

13 . A method to pass a signal through a side wall of a micro device structure, the method comprising:

providing a micro device having stacked layers comprising functional active, doped and blocking layers;

directly covering a sidewall of the micro device by with a first dielectric layer;

directly covering the first dielectric layer on the sidewall with a first conductive layer;

extending the first conductive layer to directly overlie a top surface of the microdevice thereby electrically coupling the first conductive layer to the top surface of the micro device;

overlying a bottom surface of the micro device with a second conductive layer;

electrically coupling the second conductive layer to the first conductive layer thereby electrically coupling the top surface and the bottom surface of the micro device; and

injecting the signal though the top surface and the bottom surface of the micro device, wherein a second dielectric layer directly overlying on the bottom surface of the micro device has a VIA for accessing the bottom surface of the micro device.

14 . The method of claim 13 , wherein the second conductive layer is separated from the bottom surface of the micro device by the second dielectric layer.

15 . The method of claim 14 , wherein the first and second conductive layers go around the micro device.

16 . The method of claim 15 , wherein other dielectric layers are disposed on top of the first and second conductive layers.

17 . The method of claim 13 , wherein a third conductive layer is coupled to the bottom surface of the micro device through the VIA.

18 . The method of claim 17 , wherein the third conductive layer is in part separated from the bottom surface of the micro device by the second dielectric layer.

19 . The method of claim 17 , wherein the micro device structure further includes pads coupled to each of the second and third conductive layers.

20 . The method of claim 13 , wherein the first conductive layer covers at least part of the sidewall and is extended over the first dielectric layer at least in one area.

21 . The method of claim 20 , wherein the micro device structure further includes pads on top of the first conductive layer and a fourth conductive layer.

22 . The micro device structure of claim 21 , wherein at least one of the first conductive layer and the fourth the conductive layer and a pad are the same.

23 . The micro device structure of claim 21 , wherein the first conductive layer is connected to the bottom surface of the micro device through a fifth conductive layer which is coupled to the bottom surface of the micro device.

24 . The micro device structure of claim 23 , wherein other dielectric layers cover the first and fifth conductive layers.