IP Library Granted Patent US 12708023
Granted Patent B2
US 12708023 · App. 18/536,945 · Granted Aug 11, 2026

Method of manufacturing semiconductor element

Inventors: Hirofumi Kawaguchi (Tokushima, JP); Takehiro Ishitani (Komatsushima, JP)
Assignee: NICHIA CORPORATION
H10W74/014H10P50/283H10P50/287H10P50/73
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Quick Facts
Patent No.
US 12708023
App. No.
18/536,945
Granted
Aug 11, 2026
Kind
B2
Abstract

A method of manufacturing a semiconductor element includes: providing a structure including: a semiconductor structure, a resin member, and a first insulation film; forming a cover member disposed continuously on a portion of the first insulation film; forming a resist film on the cover member, and removing a portion of the cover member; removing a portion of the first insulation film and a portion of the resin member; and removing a remaining portion of the cover member.

Claims (65)

1 . A method of manufacturing a semiconductor element, the method comprising:

providing a structure comprising:

a semiconductor structure having a first surface, a second surface opposite the first surface, and a third surface connecting the first surface and the second surface,

a resin member covering the second surface and the third surface, and

a first insulation film disposed continuously on the first surface and a surface of the resin member adjacent to the first surface in a plan view;

forming a cover member disposed continuously on a portion of the first insulation film located on the first surface and a portion of the first insulation film located on the surface of the resin member;

forming a resist film on the cover member, and removing a portion of the cover member located on the surface of the resin member such that a remaining portion of the cover member remains on the portion of the first insulation film located on the first surface;

subsequent to the step of forming the resist film and removing the portion of the cover member, removing a portion of the first insulation film and a portion of the resin member that are located in a region not overlapping the remaining portion of the cover member in the plan view by etching using the cover member as a mask; and

subsequent to the step of removing the portion of the first insulation film and the portion of the resin member, removing the remaining portion of the cover member; wherein:

an etch rate for the cover member in the step of removing the portion of the first insulation film and the portion of the resin member is lower than an etch rate for the resist film in the step of removing the portion of the first insulation film and the portion of the resin member.

2 . The method according to claim 1 , wherein, in the step of removing the portion of the first insulation film and the portion of the resin member, the resist film is removed together with the portion of the resin member.

3 . The method according to claim 1 , wherein:

the cover member is a metal; and

in the step of forming the resist film and removing the portion of the cover member,

the resist film is formed to be continuous on a portion of the cover member located on the first surface and the portion of the cover member located on the surface of the resin member, and then a portion of the resist film located on the surface of the resin member is removed by exposure and developing process,

a developing solution used in the developing process for the removal of the portion of the resist film further removes the portion of the cover member located on the surface of the resin member.

4 . The method according to claim 3 , wherein, in the step of removing the portion of the first insulation film and the portion of the resin member, the portion of the resist film is removed together with the portion of the resin member.

5 . The method according to claim 1 , wherein:

in the step of forming the resist film and removing the portion of the cover member, the portion of the cover member is removed such that outer edges of the cover member are located inward of outer edges of the first surface, and

in the step of removing the portion of the first insulation film and the portion of the resin member, a portion of the first insulation film located inward of the outer edges of the first surface is further removed.

6 . The method according to claim 1 , wherein:

the structure comprises a second insulation film disposed on the third surface of the semiconductor structure,

a thickness of the second insulation film is greater than a thickness of the first insulation film.

7 . The method according claim 1 , wherein:

in the step of providing the structure,

the first surface of the semiconductor structure of the structure has a peripheral region, and a roughened inner region located inward of the peripheral region in the plan view, and

the first insulation film comprises:

a first film that is continuous on the peripheral region and the surface of the resin member, and

a second film that is continuous on the first film and the roughened inner region; and

in the step of forming the resist film and removing the portion of the cover member, the remaining portion of the cover member remains with outer edges of the cover member overlapping the peripheral region in the plan view.

8 . The method according to claim 2 , wherein:

in the step of providing the structure,

the first surface of the semiconductor structure of the structure has a peripheral region, and a roughened inner region located inward of the peripheral region in the plan view, and

the first insulation film comprises:

a first film that is continuous on the peripheral region and the surface of the resin member, and

a second film that is continuous on the first film and the roughened inner region; and

in the step of forming the resist film and removing the portion of the cover member, the remaining portion of the cover member remains with outer edges of the cover member overlapping the peripheral region in the plan view.

9 . The method according to claim 3 , wherein:

in the step of providing the structure,

the first surface of the semiconductor structure of the structure has a peripheral region, and a roughened inner region located inward of the peripheral region in the plan view, and

the first insulation film comprises:

a first film that is continuous on the peripheral region and the surface of the resin member, and

a second film that is continuous on the first film and the roughened inner region; and

in the step of forming the resist film and removing the portion of the cover member, the remaining portion of the cover member remains with outer edges of the cover member overlapping the peripheral region in the plan view.

10 . The method according to claim 4 , wherein:

in the step of providing the structure,

the first surface of the semiconductor structure of the structure has a peripheral region, and a roughened inner region located inward of the peripheral region in the plan view, and

the first insulation film comprises:

a first film that is continuous on the peripheral region and the surface of the resin member, and

a second film that is continuous on the first film and the roughened inner region; and

in the step of forming the resist film and removing the portion of the cover member, the remaining portion of the cover member remains with outer edges of the cover member overlapping the peripheral region in the plan view.

11 . The method according to claim 5 , wherein:

in the step of providing the structure,

the first surface of the semiconductor structure of the structure has a peripheral region, and a roughened inner region located inward of the peripheral region in the plan view, and

the first insulation film comprises:

a first film that is continuous on the peripheral region and the surface of the resin member, and

a second film that is continuous on the first film and the roughened inner region; and

in the step of forming the resist film and removing the portion of the cover member, the remaining portion of the cover member remains with the outer edges of the cover member overlapping the peripheral region in the plan view.

12 . The method according to claim 6 , wherein:

in the step of providing a structure,

the first surface of the semiconductor structure of the structure has a peripheral region, and a roughened inner region located inward of the peripheral region in the plan view, and

the first insulation film comprises:

a first film that is continuous on the peripheral region and the surface of the resin member, and

a second film that is continuous on the first film and the roughened inner region; and

in the step of forming the resist film and removing the portion of the cover member, the remaining portion of the cover member remains with outer edges of the cover member overlapping the peripheral region in the plan view.