Package with molding cavity
A high-power semiconductor device module is implemented with a cavity in the molding package. The cavity reduces a volume of the molding compound, preventing an accumulation of stress in the module, and associated warpage of the package. Chip assemblies within the module are designed to fit within the cavity, so that semiconductor dies, and sensing devices therein are protected from damage during a sintering process in which the module is mounted to a heat sink. After the sintering process, the cavity can be sealed with a gel material. The molding package described herein can also enhance reliability of the module during operation, ensuring that the product is robust for electric and hybrid electric vehicle applications.
1 . An apparatus, comprising:
a substrate;
a chip assembly coupled to the substrate, the chip assembly including a semiconductor die;
a sense pad attached to the substrate and electrically coupled to the chip assembly;
a molding package formed around the chip assembly and the substrate, the molding package having a cavity including a gel material, wherein the molding package is disposed on a first portion of an upper surface of the sense pad and the gel material is disposed on a second portion of the upper surface of the sense pad;
a mounting bracket attached to the substrate; and
a lead that provides a signal path from an external device to the semiconductor die.
2 . The apparatus of claim 1 , wherein the semiconductor die includes a power inverter circuit.
3 . The apparatus of claim 2 , wherein the power inverter circuit is configured for use in one or more of an electric vehicle and a hybrid electric vehicle.
4 . The apparatus of claim 1 , wherein the gel material includes one or more of JCR6101 and HD-8820.
5 . The apparatus of claim 1 , wherein the sense pad is configured to sense an environmental condition including at least one of temperature or pressure transmitted through the gel material.
6 . The apparatus of claim 1 , further comprising a first wire bond between the semiconductor die and the sense pad and a second wire bond between the sense pad and the lead, the first wire bond being encapsulated in the gel material, the second wire bond being encapsulated in the molding package.
7 . The apparatus of claim 1 , further comprising a clip within the cavity, the clip providing connections to the semiconductor die.
8 . An apparatus, comprising:
a substrate;
a power inverter circuit coupled to the substrate;
a sense pad attached to the substrate and electrically coupled to the power inverter circuit; and
a molding package formed around the power inverter circuit and the substrate, the molding package having a cavity formed therein, wherein the cavity is filled with a gel material, and wherein the molding package is disposed on a first portion of an upper surface of the sense pad and the gel material is disposed on a second portion of the upper surface of the sense pad.
9 . The apparatus of claim 1 , wherein a first end of the sense pad is encapsulated only in the molding package and a second end of the sense pad is encapsulated only in the gel material.
10 . The apparatus of claim 8 , wherein the power inverter circuit is in a flip chip configuration.
11 . The apparatus of claim 8 , wherein the cavity has a volume that is about 15% of a volume of the molding package.
12 . The apparatus of claim 8 , further comprising a direct-bonded metal (DBM) structure that provides single sided cooling for the power inverter circuit.
13 . The apparatus of claim 8 , wherein the package exhibits warpage less than about 30 μm.
14 . A method, comprising:
attaching a chip assembly, including a semiconductor die, to a substrate;
attaching a clip between the chip assembly and the substrate;
attaching a wire bond between the chip assembly and a sense pad on the substrate;
forming a molded package around the substrate to form a module, the molded package including a cavity that exposes the chip assembly, the clip, and a first portion of an upper surface of the sense pad, the molded package being disposed on a second portion of the upper surface of the sense pad;
sintering the module to a base; and
disposing a gel material in the cavity after sintering the module to the base, wherein the gel material is disposed on the first portion of the upper surface of the sense pad.
15 . The method of claim 14 , wherein sintering the module to the base subjects the semiconductor die to a tensile stress of more than about 200 MPa.
16 . The method of claim 14 , wherein sintering the module with the cavity unfilled reduces a stress on the semiconductor die by more than about 60% during sintering.
17 . The method of claim 14 , wherein including the cavity in the molded package reduces warpage of the molded package by more than about 15% during sintering at a temperature of about 25 degrees C.
18 . The method of claim 14 , wherein including the cavity in the molded package reduces warpage of the molded package by more than about 45% during sintering at a temperature of about 220 degrees C.
19 . The method of claim 14 , wherein forming the molded package around the substrate includes forming the molded package by injection molding of an epoxy molding compound.
20 . The method of claim 14 , wherein sintering the molded package to the base includes sintering the molded package to a heat sink.