Semiconductor package and method of fabricating the same
A semiconductor package includes a photonic integrated circuit (PIC) die having a photonic layer, and an electronic integrated circuit (EIC) die bonded to the PIC die. The EIC die includes an optical region that allows the transmission of optical signals through the optical region towards the photonic layer, and a peripheral region outside of the optical region. The optical region includes optical concave/convex structures, a protection film and optically transparent material layers. The optical concave/convex structures are formed in the semiconductor structure. The protection film is conformally disposed over the optical concave/convex structures. The optically transparent material layers are disposed over the protection film and filling up the optical region. The peripheral region includes first bonding pads bonded to the photonic integrated circuit die, and via structures connected to the first bonding pads, wherein the protection film is laterally surrounding sidewalls of the via structures.
1 . A semiconductor package, comprising:
an electronic integrated circuit die, comprising:
a semiconductor structure, comprising a concaved portion;
an interconnection layer disposed on the semiconductor structure, wherein the interconnection layer has an opening portion revealing the concaved portion of the semiconductor structure;
a passivation layer disposed on the interconnection layer;
a protection film disposed on the interconnection layer over the passivation layer, and on sidewalls of the opening portion, wherein the protection film is further disposed on the concaved portion of the semiconductor structure;
a gap fill material disposed in the opening portion of the interconnection layer and surrounded by the interconnection layer;
a plurality of first bonding pads disposed on the protection film;
a photonic integrated circuit die bonded to the electronic integrated circuit die, and comprising:
a photonic layer overlapped with the opening portion of the interconnection layer; and
a plurality of second bonding pads disposed over the photonic layer, wherein the plurality of second bonding pads is bonded to the plurality of first bonding pads.
2 . The semiconductor package according to claim 1 , wherein the concaved portion of the semiconductor structure further comprises a plurality of optical concave/convex structures formed by the semiconductor structure.
3 . The semiconductor package according to claim 1 , wherein a vertical distance from a top surface of the protection film on the concaved portion to the photonic layer is free of materials selected from the group consisting of silicon nitride, silicon carbide and silicon oxynitride.
4 . The semiconductor package according to claim 1 , further comprising a capping layer disposed below the plurality of first bonding pads, wherein the capping layer has an opening section that is overlapped with the opening portion of the interconnection layer.
5 . The semiconductor package according to claim 4 , wherein sidewalls of the capping layer at the opening section are aligned with sidewalls of the protection film disposed on the opening portion.
6 . The semiconductor package according to claim 4 , wherein sidewalls of the capping layer at the opening section are misaligned with sidewalls of the protection film disposed on the opening portion.
7 . The semiconductor package according to claim 1 , further comprising via structures electrically connecting the plurality of first bonding pads to the interconnection layer, wherein the via structures are laterally surrounded by the passivation layer and the protection film.
8 . The semiconductor package according to claim 1 , wherein the electronic integrated circuit die further comprises a first bonding film surrounding the plurality of first bonding pads, and the first bonding film is disposed on the protection film and over the gap fill material, and the photonic integrated circuit die further comprises a second bonding film surrounding the plurality of second bonding pads, and wherein the first bonding film is attached to the second bonding film.
9 . A semiconductor package, comprising:
a photonic integrated circuit die comprising a photonic layer;
an electronic integrated circuit die bonded to the photonic integrated circuit die, and comprising an optical region overlapped with the photonic layer, and a peripheral region aside from the optical region,
wherein the optical region comprises;
a plurality of optical concave/convex structures formed by a semiconductor structure;
a protection film disposed over the plurality of optical concave/convex structures, wherein the protection film extends over to the peripheral region; and
optically transparent material layers disposed over the protection film and filling up the optical region;
wherein the peripheral region comprises:
a plurality of first bonding pads bonded to the photonic integrated circuit die; and
a plurality of via structures connected to the plurality of first bonding pads, wherein the protection film is laterally surrounding sidewalls of the plurality of via structures.
10 . The semiconductor package according to claim 9 , wherein the optical region consists of the plurality of optical concave/convex structures, the protection film and the optically transparent material layers, and wherein the optically transparent material layers are made of silicon oxide or polyimide.
11 . The semiconductor package according to claim 10 , wherein the optically transparent material layers include a gap fill material layer disposed on the protection film and at least a first dielectric layer disposed on the gap fill material layer, wherein a top surface of the gap film material layer is aligned with a top surface of the protection film.
12 . The semiconductor package according to claim 9 , further comprising a capping layer disposed on the protection film, wherein the capping layer comprises an opening section overlapped with the optical region.
13 . The semiconductor package according to claim 12 , wherein a width of the opening section is smaller than a width of the optical region.
14 . The semiconductor package according to claim 12 , wherein a width of the opening section is equal to a width of the optical region.
15 . The semiconductor package according to claim 9 , wherein the peripheral region further comprises a passivation layer laterally surrounding the sidewalls of the plurality of via structures and in contact with sidewalls of the protection film.