IP Library Granted Patent US 12708042
Granted Patent B2
US 12708042 · App. 18/237,225 · Granted Aug 11, 2026

Semiconductor device with volumetrically-expanded side-connected interconnects

Inventor: Kyle K. Kirby (Eagle, ID)
Assignee: Micron Technology, Inc.
H10W90/00H10W72/923H10W72/952H10W80/011H10W80/102H10W80/312H10W80/327H10W80/701H10W90/26H10W90/297H10W90/792
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Quick Facts
Patent No.
US 12708042
App. No.
18/237,225
Granted
Aug 11, 2026
Kind
B2
Abstract

A semiconductor device assembly is described that includes two semiconductor dies. The semiconductor dies each include a layer of dielectric material and a reservoir of conductive material located adjacent to openings in the layer of dielectric material. The opening at the layer of dielectric material of the first semiconductor die and the opening at the layer of dielectric material of the second semiconductor die are aligned to create an interconnect opening. The reservoirs of conductive material are heated to volumetrically expand the reservoirs of conductive material past one another such that they contact at respective non-horizontal surfaces to form an interconnect electrically coupling the semiconductor dies. In this way, a connected semiconductor device may be assembled.

Claims (22)

1 . A method of making a semiconductor device assembly, comprising:

providing a first semiconductor die including:

a first layer of dielectric material having a first opening; and

a first reservoir of conductive material located adjacent to the first opening;

providing a second semiconductor die including:

a second layer of dielectric material having a second opening corresponding to the first opening; and

a second reservoir of conductive material located adjacent to the second opening;

aligning the first semiconductor die and the second semiconductor die such that the first opening aligns with the second opening to create an interconnect opening; and

heating the first reservoir of conductive material and the second reservoir of conductive material configured to cause the first reservoir of conductive material and the second reservoir of conductive material to volumetrically expand through the interconnect opening past one another such that a non-horizontal surface of the first reservoir of conductive material contacts a non-horizontal surface of the second reservoir of conductive material to form an interconnect electrically coupling the first semiconductor die and the second semiconductor die.

2 . The method of claim 1 , wherein:

a first boundary of the first reservoir of conductive material is located at a first lateral location; and

a second boundary of the second reservoir of conductive material is located at the first lateral location.

3 . The method of claim 2 , wherein:

a third boundary of the first reservoir of conductive material is located at a second lateral location; and

a fourth boundary of the second reservoir of conductive material is located at a third lateral location different from the second lateral location.

4 . The method of claim 2 , wherein the non-horizontal surface of the first reservoir of conductive material contacts the non-horizontal surface of the second reservoir of conductive material at the first lateral location when the first reservoir of conductive material and the second reservoir of conductive material are volumetrically expanded.

5 . The method of claim 2 , wherein the first lateral location corresponds to a centerline of the interconnect opening.

6 . The method of claim 1 , wherein the first reservoir of conductive material is at least partially laterally offset from the first opening.

7 . The method of claim 1 , wherein:

the first reservoir of conductive material has a first width; and

the first opening has a second width greater than the first width.

8 . The method of claim 1 , further comprising creating a bond between the first layer of dielectric material and the second layer of dielectric material.