IP Library Granted Patent US 12708046
Granted Patent B2
US 12708046 · App. 18/328,859 · Granted Aug 11, 2026

Semiconductor device including cross-die bonding ring and methods for forming the same

Inventors: Chen-Shien Chen (Zhubei City, TW); Chih-Hong Wang (Taipei City, TW); Ting Hao Kuo (Hsinchu City, TW); Yu-Chia Lai (Zhunan Township, TW)
Assignee: Taiwan Semiconductor Manufacturing Company Limited
H10W90/00H10W20/20H10W42/00H10W70/685H10W74/117H10W72/952H10W80/312H10W90/20H10W90/732H10W90/734
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Quick Facts
Patent No.
US 12708046
App. No.
18/328,859
Granted
Aug 11, 2026
Kind
B2
Abstract

A semiconductor die includes lower dies separated by a dielectric region; a cross die vertically stacked on the lower dies and the dielectric region; a molding structure filling the dielectric region and surrounding side surfaces of the lower dies and the cross die; and a bonding ring connecting the cross die to the lower dies and including: an upper metal ring formed in a bottom surface of the cross die; and a lower metal ring formed in top surfaces of the lower dies and extending through the molding structure in the dielectric region. The lower metal ring is bonded to the upper metal ring.

Claims (69)

1 . A semiconductor device comprising:

at least two lower dies separated by a dielectric region;

a cross die vertically stacked on the at least two lower dies and the dielectric region;

a lower dielectric layer filling the dielectric region and laterally surrounding side surfaces of the at least two lower dies;

an upper dielectric layer laterally surrounding side surfaces of the cross die;

a bonding ring formed in a bottom surface of the cross die, top surfaces of the two lower dies, and a top surface of the lower dielectric layer in the dielectric region, so as to connect the cross die to the two lower dies; and

bonding lines disposed inside of the bonding ring and connecting the cross die to the two lower dies,

wherein a portion of the bonding ring is disposed in the lower dielectric layer and extends across the dielectric region.

2 . The semiconductor device of claim 1 , wherein the bonding lines comprise:

upper metal lines formed in the bottom surface of the cross die; and

lower metal lines formed in the top surface of the two lower dies, wherein each lower metal line is bonded to a corresponding upper metal line.

3 . The semiconductor device of claim 1 , wherein the bonding lines comprise:

first bonding lines that extend in a first direction along opposing sides of a first portion of the dielectric region; and

second bonding lines that extend in a second direction perpendicular to the first direction, along opposing sides of a second portion of the dielectric region.

4 . The semiconductor device of claim 3 , wherein:

the first bonding lines extend across the second portion of the dielectric region; and

the second bonding lines extend across the first portion of the dielectric region.

5 . The semiconductor device of claim 1 , wherein:

a minimum distance between at least a portion of the bonding ring and an edge of the cross die is greater than 0 microns (μm) and is less than 20 μm; and

a minimum distance between at least a portion of each bonding line and the dielectric region is greater than 0 microns (μm) and is less than 20 μm.

6 . The semiconductor device of claim 1 , wherein:

the bonding ring comprises:

an upper metal ring formed in a bottom surface of the cross die; and

a lower metal ring formed in top surfaces of the lower dies and extending through the dielectric region, wherein the lower metal ring is bonded to the upper metal ring; and

a width of at least one or the upper metal ring and the lower metal ring, taken in a horizontal direction, is greater than 25% of a height of the cross die taken in a vertical direction.

7 . The semiconductor device of claim 1 , wherein the bonding lines each overlap with a single one of the two lower dies and do not extend through the dielectric region.

8 . A semiconductor device comprising:

a first lower die and a second lower die separated by a dielectric region;

a cross die vertically stacked on the first lower die, the second lower die, and the dielectric region;

a lower dielectric layer filling the dielectric region and laterally surrounding side surfaces of the first lower die and the second lower die;

an upper dielectric layer laterally surrounding side surfaces of the cross die;

a bonding ring formed in a bottom surface of the cross die, top surfaces of the first lower die and the second lower die, and a top surface of the lower dielectric layer in the dielectric region, so as to connect the cross die to the two lower dies; and

a first bonding line disposed inside of the bonding ring and connecting the cross die to the first lower die; and

a second bonding line disposed inside of the bonding ring and connecting the cross die to the second lower die,

wherein a portion of the bonding ring is disposed in the lower dielectric layer and extends across the dielectric region.

9 . The semiconductor device of claim 8 , wherein:

the first bonding line is disposed within a perimeter of the first lower die; and

the second bonding line is disposed within a perimeter of the second lower die.

10 . The semiconductor device of claim 8 , wherein:

the first bonding line extends along at least two edges of the first lower die; and

the second bonding line extends along at least two edges of the second lower die.

11 . The semiconductor device of claim 10 , wherein the first and second bonding lines comprise discontinuous segments.

12 . The semiconductor device of claim 8 , wherein the bonding ring comprises:

an upper metal ring embedded in the bottom surface of the cross die; and

a lower metal ring embedded the top surfaces of the first lower die, the second lower die, and the lower dielectric layer,

wherein the lower metal ring is bonded to the upper metal ring.

13 . The semiconductor device of claim 12 , wherein the lower metal ring extends through the dielectric region.

14 . The semiconductor device of claim 12 , wherein the upper and lower metal rings comprise discontinuous segments.

15 . The semiconductor device of claim 12 , wherein a bottom surface of the upper metal ring contacts at least 10% of a top surface of the lower metal ring.

16 . A semiconductor device comprising:

four lower dies separated by a dielectric region;

a cross die vertically stacked on the lower dies and the dielectric region;

a lower dielectric layer filling the dielectric region and laterally surrounding side surfaces of the lower dies;

an upper dielectric layer laterally surrounding side surfaces of the cross die;

a bonding ring formed in a bottom surface of the cross die, top surfaces of the lower dies, and a top surface of the lower dielectric layer in the dielectric region, so as to connect the cross die to the lower dies; and

bonding lines disposed inside of the bonding ring and connecting the cross die to the lower dies,

wherein a portion of the bonding ring is disposed in the lower dielectric layer and extends across the dielectric region.

17 . The semiconductor device of claim 16 , wherein the bonding lines comprise:

first bonding lines that extend in a first direction along opposing sides of a first portion of the dielectric region; and

second bonding lines that extend in a second direction perpendicular to the first direction, along opposing sides of a second portion of the dielectric region.

18 . The semiconductor device of claim 17 , wherein:

the first bonding lines extend across the second portion of the dielectric region; and

the second bonding lines extend across the first portion of the dielectric region.

19 . The semiconductor device of claim 16 , wherein the bonding ring, the bonding lines, or both the bonding ring and the bonding lines comprise discontinuous segments.

20 . The semiconductor device of claim 1 , wherein:

the bonding ring comprises:

an upper metal ring formed in a bottom surface of the cross die; and

a lower metal ring formed in top surfaces of the lower dies and extending through the dielectric region, wherein the lower metal ring is bonded to the upper metal ring; and

a width of at least one or the upper metal ring and the lower metal ring, taken in a horizontal direction, is greater than 25% of a height of the cross die taken in a vertical direction.