Wafer level chip scale package with rhombus shape

1 . A wafer level chip scale package with a rhombus shape comprising:

a semiconductor chip with a rhombus shape; and

a solder ball array comprising a plurality of solder balls formed on one surface of the semiconductor chip,

wherein

among four interior angles of the semiconductor chip, two of the four interior angles facing each other in a short diagonal direction are approximately 120°, and two of the four interior angles facing each other in a long diagonal direction are approximately 60°

the solder balls are arranged in a plurality of rows in the solder ball array,

n solder balls are arranged on the short diagonal of the semiconductor chip, and

in upper and lower regions of the short diagonal of the semiconductor chip, a number of solder balls in each row decreasing one by one until the number of solder balls becomes one from the n solder balls is alternately arranged.

2 . The wafer level chip scale package of claim 1 , wherein

separation distances between adjacent solder balls constituting the solder ball array are the same.

3 . The wafer level chip scale package of claim 2 , wherein

the semiconductor chip has a planar shape formed by two equilateral triangles, and

the plurality of solder balls constituting the solder ball array are symmetrically arranged on the one surface of the semiconductor chip with respect to a short diagonal and a long diagonal of the semiconductor chip.

4 . The wafer level chip scale package of claim 3 , wherein

a triangle formed by three line segments connecting three center points of three of the solder balls that are adjacent to each other is equilateral.