Abbreviated loopback attenuation
Improved performance for attenuated testing when probing a device under test with a probe array is provided. By moving the attenuation components from their conventional location on the printed circuit board of the probe head to the space transformer of the probe head, electrical path lengths can be decreased, thereby improving performance. This is particularly helpful in connection with loopback testing.
1 . A method of providing a specified attenuation for probe testing, the method comprising:
making temporary electrical contact between a probe head and a device under test; and
performing electrical testing of the device under test using the probe head;
wherein the probe head includes a space transformer having a first side in electrical contact with test equipment and a second side in direct electrical contact with a probe array;
wherein the electrical testing includes at least one test where an attenuation for the electrical testing is provided by one or more resistive components disposed on the space transformer;
wherein the electrical testing includes at least one loopback test where a first probe of the probe array receives a signal from the device under test and where a second probe of the probe array provides an attenuated version of the signal to the device under test;
wherein the attenuated version of the signal is attenuated by the one or more resistive components disposed on the space transformer.
2 . The method of claim 1 , wherein the attenuation for the electrical testing is a fixed value that can be altered by an end user by changing at least one of the resistive components.
3 . The method of claim 1 , wherein the attenuation for the electrical testing includes a differential attenuation of two signal paths.
4 . The method of claim 1 , wherein the attenuation for the electrical testing includes a single-ended attenuation of a single signal path.
5 . The method of claim 1 , wherein a frequency of the electrical testing is in a range from 0.1 GHZ to 120 GHZ.
6 . The method of claim 1 , wherein the resistive components include resistors disposed on a multi-level organic substrate that is disposed on the space transformer.
7 . The method of claim 1 , wherein design of the resistive components accounts for one or more process parameters selected from the group consisting of: resistive component placement accuracy, resistive component motion during reflow, and sizes of contact pads on the space transformer that resistive components make contact to.
8 . The method of claim 1 , wherein the device under test is part or all of a wafer.
9 . The method of claim 1 , wherein the probe array is an array of vertical probes.
10 . The method of claim 1 , wherein the resistive components include surface mount technology components.
11 . The method of claim 1 , wherein a transmission line impedance for the electrical testing is 50Ω.
12 . The method of claim 1 , wherein a transmission line impedance for the electrical testing is a specified value other than 50Ω.
13 . The method of claim 1 , wherein the electrical testing includes at least one test where a first probe of the probe array sends a first signal to the device under test and where a second probe of the probe array receives a second signal from the device under test;
wherein the first signal and/or the second signal is attenuated by the one or more resistive components disposed on the space transformer.