Apparatus for testing semiconductor device test
View Patent ↗An apparatus for testing semiconductor device according to one embodiment comprises: a thermoelement module having both-side surfaces converted into heating surfaces or cooling surfaces according to the direction of a current; a cooling module, which is arranged on the thermoelement module and cools a thermoelement; a pusher module which is arranged under the thermoelement module, and which comes in contact with a device to be tested, mounted in a holder, so as to heat or cool the device to be tested; and a control module for controlling the direction of a current supplied to the thermoelement module according to a target temperature value.
1 . An apparatus for testing semiconductor device comprising:
a thermoelectric element module having both opposing surfaces switched to a heating surface or a cooling surface according to a flow direction of current flowing in the thermoelectric element module;
a cooling module disposed on top of the thermoelectric element module and configured to cool the thermoelectric element;
a pusher module disposed under the thermoelectric element module and contacting a test target device mounted on a holder to heat or cool the test target device; and
a control module configured to control the flow direction of the current to be supplied to the thermoelectric element module based on a target temperature value,
wherein the thermoelectric element module includes:
an upper substrate in contact with the cooling module;
a lower substrate in contact with the pusher module;
an intermediate substrate disposed between the upper substrate and the lower substrate;
a plurality of first semiconductor elements and a plurality of second semiconductor elements disposed between the upper substrate and the intermediate substrate; and
a plurality of third semiconductor elements and a plurality of fourth semiconductor elements disposed between the intermediate substrate and the lower substrate,
wherein a temperature sensor is disposed at one side of the intermediate substrate or inside the intermediate substrate,
wherein the control module is configured to control the flow direction of the current to be supplied to the thermoelectric element module, based on a temperature value of the intermediate substrate measured by the temperature sensor.
2 . The apparatus for testing semiconductor device of claim 1 , wherein the control module is configured to:
in increasing a temperature of the lower substrate to a preset final target temperature value,
control the flow direction of the current to be supplied to the thermoelectric element module, based on a temperature value of the intermediate substrate, a preset intermediate rising target temperature value, and a preset intermediate falling target temperature value.
3 . The apparatus for testing semiconductor device of claim 2 , wherein the control module is configured to:
when the temperature value of the intermediate substrate exceeds a predetermined reference temperature value in increasing the temperature of the lower substrate according to the intermediate rising target temperature value,
control the flow direction of the current to be supplied to the thermoelectric element module such that the temperature of the lower substrate is decreased based on the intermediate falling target temperature value.
4 . The apparatus for testing semiconductor device of claim 2 , wherein the intermediate rising target temperature value includes a plurality of values set to gradually increase by a predetermined increment.
5 . The apparatus for testing semiconductor device of claim 3 , wherein the reference temperature value is set to be lower than a limit temperature value of the intermediate substrate.
6 . The apparatus for testing semiconductor device of claim 1 , wherein each of the first semiconductor element, the second semiconductor element, the third semiconductor element, and the fourth semiconductor element has a hexahedral shape, and has an upper surface and a lower surface having a square shape.
7 . The apparatus for testing semiconductor device of claim 6 , wherein a numerical ratio (W:H) of a length W of each of four sides of the upper surface or the lower surface of each of the first semiconductor element, the second semiconductor element, the third semiconductor element, the fourth semiconductor element and a height H of each of the first semiconductor element, the second semiconductor element, the third semiconductor element, and the fourth semiconductor element is set to be within a range of 1:1 to 1:1.4.