IP Library Granted Patent US 12710606
Granted Patent B2
US 12710606 · App. 18/619,037 · Granted Aug 18, 2026

Heterogeneous packaging integration of photonic and electronic elements

Inventors: Stefan Rusu (Hsin-Chu, TW); Weiwei Song (Sunnyvale, CA); Mohammed Rabiul Islam (Austin, TX)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
G02B6/425G02B6/4268H10W40/22H10W90/00H10W20/20
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Quick Facts
Patent No.
US 12710606
App. No.
18/619,037
Granted
Aug 18, 2026
Kind
B2
Abstract

Heterogeneous packaging integration of photonic and electronic elements is described herein. In one embodiment, a disclosed package includes: a package substrate; a first layer comprising an electronic die on the package substrate; and a second layer comprising a photonic die. The second layer is bonded onto the first layer such that the photonic die is bonded onto the electronic die.

Claims (72)

1 . A method for forming a semiconductor device, comprising:

forming a first layer comprising an electronic die and a bottom die;

forming a second layer comprising a photonic die and a top die, wherein the electronic die comprises at least one driver for the photonic die;

bonding the second layer onto the first layer to generate a bonded stack, wherein the photonic die is bonded onto the electronic die with hybrid bonds, which comprise dielectric-to-dielectric bonds and metal-to-metal bonds; and

mechanically and electrically attaching the bonded stack onto a package substrate using conductive bumps, wherein the first layer is attached to the package substrate with the conductive bumps.

2 . The method of claim 1 , wherein the bottom die comprises analog and chipset functions, and forming the first layer comprises:

depositing silicon in the first layer on a first substrate;

determining a geometric pattern from a photomask based on photolithography;

etching the silicon to determine etched regions based on the geometric pattern; and

epitaxially growing one or more semiconductor materials in the etched regions to form:

the electronic die, the bottom die, and a via between the bottom die and the electronic die in the first layer, wherein the via provides electrical connectivity between the second layer and the package substrate after bonding the second layer onto the first layer.

3 . The method of claim 1 , wherein the top die comprises computing elements, and forming the second layer comprises:

depositing silicon in the second layer on a second substrate;

defining a geometric pattern from a photomask based on photolithography;

etching the silicon to determine etched regions based on the geometric pattern; and

epitaxially growing one or more semiconductor materials in the etched regions to form the photonic die and the top die,

wherein the photonic die is bonded to the electronic die with the hybrid bonds in a face-to-face configuration.

4 . The method of claim 3 , further comprising:

depositing a heat spreader on the second layer; and

forming a thermal break in the heat spreader between the top die and the photonic die.

5 . The method of claim 1 , further comprising:

forming a pedestal on the package substrate and adjacent to the electronic die in the first layer;

attaching a polymer lens to the photonic die in the second layer, wherein the polymer lens is positioned on the pedestal; and

attaching an optical fiber to the polymer lens, such that the polymer lens couples light transmission between the optical fiber and the photonic die.

6 . The method of claim 1 , further comprising:

depositing a mold on the package substrate and adjacent to the electronic die in the first layer;

depositing a polymer waveguide on the mold, wherein the polymer waveguide is attached to the photonic die in the second layer; and

attaching a fiber array to the polymer waveguide, such that the polymer waveguide couples light transmission between the fiber array and the photonic die,

wherein the top die comprises a first component configured to operate at a first operation frequency, and the bottom die comprises a second component configured to operate at a second operation frequency that is lower than the first operation frequency.

7 . A method for forming a semiconductor device, comprising:

forming a first layer, comprising an electronic die and a bottom die, over a substrate; and

forming a second layer on the first layer, wherein the second layer comprises a photonic die and a top die,

wherein the top die comprises a first component configured to operate at a first operation frequency, and the bottom die comprises a second component configured to operate at a second operation frequency that is lower than the first operation frequency.

8 . The method of claim 7 , further comprising:

bonding the photonic die to the electronic die with hybrid bonds.

9 . The method of claim 8 , wherein bonding the photonic die to the electronic die with hybrid bonds further comprises:

bonding the photonic die to the electronic die in a face-to-face configuration.

10 . The method of claim 7 , wherein:

the electronic die comprises a driver for the photonic die.

11 . The method of claim 7 , wherein the bottom die is separated from the electronic die by a via that provides electrical connectivity between the second layer and a package substrate.

12 . The method of claim 11 , wherein:

the top die is bonded onto the bottom die; and

the top die is separated from the photonic die in the second layer.

13 . The method of claim 12 , wherein:

the bottom die comprises a first plurality of components;

the top die comprises a second plurality of components; and

compared to a first component of the first plurality of components in the bottom die, a second component of the second plurality of components in the top die has at least one of: a higher operation frequency, a higher clock frequency, a greater circuit area scaling capability, or a higher memory speed.

14 . A method for forming a semiconductor device, comprising:

forming a first layer by performing operations comprising:

determining a first geometric pattern from a first photomask based on photolithography;

etching a first silicon substrate to determine first etched regions based on the first geometric pattern; and

epitaxially growing one or more first semiconductor materials in the first etched regions to form an electronic die and a bottom die that comprises analog and chipset functions in the first layer;

forming a second layer by performing operations comprising:

determining a second geometric pattern from a second photomask based on photolithography;

etching a second silicon substrate to determine second etched regions based on the second geometric pattern; and

epitaxially growing one or more second semiconductor materials in the second etched regions to form a photonic die and a top die with computing elements; and

bonding the second layer onto the first layer in a face-to-face orientation to generate a bonded stack, wherein the photonic die is bonded onto the electronic die with hybrid bonds.

15 . The method of claim 14 , further comprising:

mechanically and electrically attaching the bonded stack onto a package substrate using conductive bumps, wherein the first layer is attached to the package substrate with the conductive bumps.

16 . The method of claim 14 , wherein a pitch or vertical distance between the electronic die and the photonic die is less than 10 microns.

17 . The method of claim 14 , wherein the top die comprises a first component configured to operate at a first operation frequency, and the bottom die comprises a second component configured to operate at a second operation frequency that is lower than the first operation frequency.

18 . The method of claim 14 , further comprising:

depositing a heat spreader on the second layer; and

forming a thermal break in the heat spreader between the top die and the photonic die.

19 . The method of claim 15 , further comprising:

forming a pedestal on the package substrate adjacent to the electronic die in the first layer;

attaching a polymer lens to the photonic die in the second layer, wherein the polymer lens is positioned on the pedestal; and

attaching an optical fiber to the polymer lens, such that the polymer lens couples light transmission between the optical fiber and the photonic die.

20 . The method of claim 15 , further comprising:

depositing a mold on the package substrate and adjacent to the electronic die in the first layer;

depositing a polymer waveguide on the mold, wherein the polymer waveguide is attached to the photonic die in the second layer; and

attaching a fiber array to the polymer waveguide, such that the polymer waveguide couples light transmission between the fiber array and the photonic die.