Power and performance controls for powering dynamic power loads with static power sources

1 . A streaming media player [SMP device] comprising:

a processor;

memory;

a Wi-Fi circuit;

a Bluetooth circuit;

a graphics circuit;

a Universal Serial Bus (USB) interface configured to provide power to the SMP device, wherein the USB interface comprises a maximum power output; and

a control circuit comprising:

a system voltage node coupled to the USB interface, a System Power and Performance Control (SPC) circuit, an inductor, and a Power Management Integrated Circuit (PMIC),

the inductor coupling a high-voltage capacitor to the system voltage node, wherein the inductor is configured to regulate a current between the system voltage node and the high-voltage capacitor,

the high-voltage capacitor,

the PMIC configured to:

determine the maximum power output of the USB interface,

the SPC circuit configured to:

monitor a system loading power of the SMP device relative to the maximum power output of the USB interface,

monitor a system voltage of the system voltage node,

monitor a capacitor voltage of the high-voltage capacitor,

determine that the system loading power is greater than the maximum power output of the USB interface,

control the current through the inductor to discharge the high-voltage capacitor and provide additional system loading power to the system voltage node, wherein the additional system loading power comprises a difference between the system loading power and the maximum power output of the USB interface, wherein the current through the inductor is continuously adjusted based on a function of an instantaneous power-gap between the system loading power and the maximum power output,

determine that the capacitor voltage is less than a warning threshold, and

generate a warning signal that indicates (i) a potential power loss, and (ii) a minimum buffering time to perform a corrective action; and

the PMIC further configured to:

control power to the processor, the memory, the Wi-Fi circuit, the Bluetooth circuit, and the graphics circuit, and

perform the corrective action, wherein the corrective action comprises reducing power to at least one of the processor, the memory, the Wi-Fi circuit, the Bluetooth circuit, or the graphics circuit.

2 . The SMP device of claim 1 , wherein the SPC circuit is further configured to:

determine that the system loading power is less than the maximum power output of the USB interface;

control the current through the inductor to charge the high-voltage capacitor, wherein the current through the inductor to charge the high-voltage capacitor is continuously adjusted based on the function of the instantaneous power-gap between the system loading power and the maximum power output;

determine that the capacitor voltage is equal to, or greater than, a capacitor ready threshold;

generate a ready signal that indicates that the high-voltage capacitor is ready to discharge and provide the additional system loading power;

control the current through the inductor to charge the high-voltage capacitor above the capacitor ready threshold;

determine that the capacitor voltage is equal to a capacitor maximum threshold to within a 10% tolerance; and

control the current through the inductor to cease charging of the high-voltage capacitor and maintain the capacitor voltage at the capacitor maximum threshold to within the 10% tolerance.

3 . The SMP device of claim 2 , wherein the SPC circuit is further configured to:

determine that the capacitor voltage is less than an alarm threshold, and

generate an alarm signal that indicates (i) the high-voltage capacitor is depleted, (ii) the system voltage is decreasing, and (iii) a shutdown mode is required, and

wherein the PMIC is further configured to:

initiate the shutdown mode in response to the alarm signal, wherein the shutdown mode comprises shutting down the SMP device.

4 . A streaming media player [SMP device] comprising:

one or more system modules;

a power source comprising a power limit; and

a control circuit comprising:

a system voltage node coupled to the power source and an inductor,

the inductor coupled to a capacitor,

a Power Management Integrated Circuit (PMIC) configured to:

detect the power limit for the power source, and

transfer power from the system voltage node to the one or more system modules; and

a System Power and Performance Control (SPC) circuit configured to:

monitor a system loading power of the SMP device relative to the power limit,

monitor a capacitor voltage of the capacitor,

determine that the system loading power is greater than the power limit, and

discharge the capacitor to provide additional power to the system voltage node, wherein the additional power is continuously adjusted based on a function of an instantaneous power-gap between the system loading power and the power limit.

5 . The SMP device of claim 4 , wherein the SPC circuit is further configured to:

determine that the capacitor voltage is less than a warning threshold; and

generate a warning signal that indicates (i) a potential power loss, and (ii) a minimum buffering time to perform a corrective action.

6 . The SMP device of claim 5 , wherein the PMIC is further configured to:

perform the corrective action comprising at least one of (i) displaying a warning message, (ii) reducing power to at least one of the one or more system modules, and (iii) shutting down at least one of the one or more system modules.

7 . The SMP device of claim 4 , wherein the SPC circuit is further configured to:

monitor a system voltage of the system voltage node;

determine that the capacitor voltage is less than an alarm threshold;

determine that the system voltage is decreasing; and

generate an alarm signal that indicates (i) the capacitor is depleted, and (ii) the system voltage is decreasing.

8 . The SMP device of claim 7 , wherein the PMIC is further configured to:

initiate a shutdown mode comprising at least one of (i) displaying an alarm message, and (ii) shutting down the one or more system modules.

9 . The SMP device of claim 4 , wherein the SPC circuit is further configured to:

determine that the system loading power is less than the power limit; and

charge the capacitor using excess power between the system loading power and the power limit, wherein the excess power is continuously adjusted based on the function of the instantaneous power-gap between the system loading power and the power limit.

10 . The SMP device of claim 9 , wherein the SPC circuit is further configured to:

determine that the capacitor voltage is equal to, or greater than, a capacitor ready threshold; and

generate a ready signal that indicates that the capacitor is ready to provide the additional power.

11 . The SMP device of claim 9 , wherein the SPC circuit is further configured to:

determine that the capacitor voltage is equal to a capacitor maximum threshold to within a 10% tolerance; and

cease charging of the capacitor and maintain the capacitor voltage at the capacitor maximum threshold to within the 10% tolerance.

12 . A method comprising:

detecting, by a Power Management Integrated Circuit (PMIC) of a control circuit of a streaming media player [SMP device], a power limit for a power source of the SMP device;

transferring, by the PMIC, power from a system voltage node of the control circuit to one or more system modules of the SMP device, wherein the system voltage node is coupled to the power source and an inductor, and wherein the inductor is coupled to a capacitor;

monitoring, by a System Power and Performance Control (SPC) circuit of the control circuit, a system loading power of the SMP device relative to the power limit;

monitoring, by the SPC circuit, a capacitor voltage of the capacitor;

determining, by the SPC circuit, that the system loading power is greater than the power limit; and

discharging, by the SPC circuit, the capacitor to provide additional power to the system voltage node, wherein the additional power is continuously adjusted based on a function of an instantaneous power-gap between the system loading power and the power limit.

13 . The method of claim 12 , comprising:

determining, by the SPC circuit, that the capacitor voltage is less than a warning threshold; and

generating, by the SPC circuit, a warning signal that indicates (i) a potential power loss, and (ii) a minimum buffering time to perform a corrective action.

14 . The method of claim 13 , comprising:

performing, by the PMIC, the corrective action comprising at least one of (i) displaying a warning message, (ii) reducing power to at least one of the one or more system modules, and (iii) shutting down at least one of the one or more system modules.

15 . The method of claim 12 , comprising:

monitoring, by the SPC circuit, a system voltage of the system voltage node;

determining, by the SPC circuit, that the capacitor voltage is less than an alarm threshold;

determining, by the SPC circuit, that the system voltage is decreasing; and

generating, by the SPC circuit, an alarm signal that indicates (i) the capacitor is depleted, and (ii) the system voltage is decreasing.

16 . The method of claim 15 , comprising:

initiating, by the PMIC, a shutdown mode comprising at least one of (i) displaying an alarm message, and (ii) shutting down the one or more system modules.

17 . The method of claim 12 , comprising:

determining, by the SPC circuit, that the system loading power is less than the power limit; and

charging, by the SPC circuit, the capacitor using excess power between the system loading power and the power limit, wherein the excess power is continuously adjusted based on the function of the instantaneous power-gap between the system loading power and the power limit.

18 . The method of claim 17 , comprising:

determining, by the SPC circuit, that the capacitor voltage is equal to, or greater than, a capacitor ready threshold; and

generating, by the SPC circuit, a ready signal that indicates that the capacitor is ready to provide the additional power.

19 . The method of claim 17 , comprising:

determining, by the SPC circuit, that the capacitor voltage is equal to a capacitor maximum threshold to within a 10% tolerance; and

ceasing, by the SPC circuit, charging of the capacitor and maintaining the capacitor voltage at the capacitor maximum threshold to within the 10% tolerance.

20 . The method of claim 12 , comprising:

charging the capacitor, wherein the charging the capacitor comprises closing a switch when the capacitor voltage is less than a system voltage;

maintaining the capacitor voltage at a capacitor maximum threshold, to within a 10% tolerance, wherein the maintaining the capacitor voltage comprises opening the switch when the capacitor voltage is equal to the capacitor maximum threshold, to within the 10% tolerance; and wherein the discharging the capacitor comprises closing the switch when the system voltage is less than the capacitor voltage.