IP Library Granted Patent US 12,710,888
Granted Patent B2
US 12,710,888 · App. 18/888,761 · Granted Aug 18, 2026

Contiguous page detection for live migration

Inventor: Hua Ye (San Jose, CA)
Assignee: Micron Technology, Inc.
G06F3/0647G06F3/0604G06F3/0679
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Quick Facts
Patent No.
US 12,710,888
App. No.
18/888,761
Granted
Aug 18, 2026
Kind
B2
Abstract

A host command to track migration of a set of memory pages is received. One or more bitmaps associated with the set of memory pages is identified. Whether a subset of a plurality of physical memory pages storing the one or more bitmaps is addressable by a contiguous set of physical addresses is determined. The subset of the plurality of physical memory pages by a single memory initialization operation is initialized responsive to determining that the subset of the plurality of physical memory pages is addressable by a contiguous set of physical addresses.

Claims (38)

1 . A system comprising:

a plurality of memory devices; and

a processing device, operatively coupled with the plurality of memory devices, to perform operations comprising:

receiving a host command to track migration of a set of memory pages;

identifying one or more bitmaps associated with the set of memory pages, wherein each of the one or more bitmaps is divided into a plurality of logical pages, and wherein each logical page of the plurality of logical pages is stored in a respective physical memory page;

determining, for a subset of the plurality of logical pages of a respective bitmap, whether the physical memory pages storing the subset of the plurality of logical pages are addressable by a contiguous set of physical addresses; and

responsive to determining that the physical memory pages storing the subset of the plurality of logical pages are addressable by a contiguous set of physical addresses, initializing the physical memory pages storing the subset of the plurality of logical pages by a single memory initialization operation.

2 . The system of claim 1 , wherein determining that the physical memory pages are addressable by a contiguous set of physical addresses further comprises:

determining that a sum of physical addresses of the physical memory pages is equal to a minimum physical address of the subset multiplied by a number of physical memory pages in the subset incremented by a sum of integers starting from a first integer to a second integer.

3 . The system of claim 2 , wherein the first integer is zero and the second integer is one less than the number of physical memory pages in the subset.

4 . The system of claim 1 , wherein the processing device is to perform operations further comprising:

responsive to determining that the physical memory pages are not addressable by a contiguous set of physical addresses, initializing each physical memory page of the subset by a single memory initialization operation.

5 . The system of claim 1 , wherein the one or more bitmaps include one of: a page bitmap, a first dirty bitmap, or a second dirty bitmap.

6 . The system of claim 1 , wherein initializing the physical memory pages by a single memory initialization operation comprises writing all bits in the physical memory pages to a specific value.

7 . A method comprising:

receiving a host command to track migration of a set of memory pages;

identifying one or more bitmaps associated with the set of memory pages, wherein each of the one or more bitmaps is divided into a plurality of logical pages, and wherein each logical page of the plurality of logical pages is stored in a respective physical memory page;

determining, for a subset of the plurality of logical pages of a respective bitmap, whether the physical memory pages storing the subset of the plurality of logical pages are addressable by a contiguous set of physical addresses; and

responsive to determining that the physical memory pages storing the subset of the plurality of logical pages are addressable by a contiguous set of physical addresses, initializing the physical memory pages storing the subset of the plurality of logical pages by a single memory initialization operation.

8 . The method of claim 7 , wherein determining that the physical memory pages are addressable by a contiguous set of physical addresses further comprises:

determining that a sum of physical addresses of the physical memory pages is equal to a minimum physical address of the subset multiplied by a number of physical memory pages in the subset incremented by a sum of integers starting from a first integer to a second integer.

9 . The method of claim 8 , wherein the first integer is zero and the second integer is one less than the number of physical memory pages in the subset.

10 . The method of claim 7 , further comprising:

responsive to determining that the physical memory pages are not addressable by a contiguous set of physical addresses, initializing each physical memory page of the subset by a single memory initialization operation.

11 . The method of claim 7 , wherein the one or more bitmaps include one of: a page bitmap, a first dirty bitmap, or a second dirty bitmap.

12 . The method of claim 7 , wherein initializing the physical memory pages by a single memory initialization operation comprises writing all bits in the physical memory pages to a specific value.

13 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

receiving, by a processing device, a host command to track migration of a set of memory pages;

identifying one or more bitmaps associated with the set of memory pages, wherein each of the one or more bitmaps is divided into a plurality of logical pages, and wherein each logical page of the plurality of logical pages is stored in a respective physical memory page;

determining, for a subset of the plurality of logical pages of a respective bitmap, whether the physical memory pages storing the subset of the plurality of logical pages are addressable by a contiguous set of physical addresses; and

responsive to determining that the physical memory pages storing the subset of the plurality of logical pages are addressable by a contiguous set of physical addresses, initializing the physical memory pages storing the subset of the plurality of logical pages by a single memory initialization operation.

14 . The non-transitory computer-readable storage medium of claim 13 , wherein determining that the physical memory pages are addressable by a contiguous set of physical addresses further comprises:

determining that a sum of physical addresses of the physical memory pages is equal to a minimum physical address of the subset multiplied by a number of physical memory pages in the subset incremented by a sum of integers starting from a first integer to a second integer.

15 . The non-transitory computer-readable storage medium of claim 14 , wherein the first integer is zero and the second integer is one less than the number of physical memory pages in the subset.

16 . The non-transitory computer-readable storage medium of claim 13 , wherein the processing device is to perform operations further comprising:

responsive to determining that the physical memory pages are not addressable by a contiguous set of physical addresses, initializing each physical memory page of the subset by a single memory initialization operation.

17 . The non-transitory computer-readable storage medium of claim 13 , wherein the one or more bitmaps include one of: a page bitmap, a first dirty bitmap, or a second dirty bitmap.

18 . The non-transitory computer-readable storage medium of claim 13 , wherein initializing the physical memory pages by a single memory initialization operation comprises writing all bits in the physical memory pages to a specific value.