Scan ahead and analysis of NVMe command submission queues on host system for scheduling of internal memory management operations
A processing device in a memory sub-system detects an occurrence of a scan ahead trigger event in a memory sub-system, initiates a scan ahead operation of a plurality of command submission queues in a host system coupled to the memory sub-system to read a plurality of pending command submission queue entries from the plurality of command submission queues, and stores respective indications of the plurality of pending command submission queue entries in a cache memory of the memory sub-system.
1 . A system comprising:
a memory device;
a cache memory; and
a processing device, operatively coupled with the memory device and the cache memory, to perform operations comprising:
analyzing respective indications of a plurality of pending command submission queue entries in the cache memory to determine expected initialization and completion times for the plurality of pending command submission queue entries;
determining, based on the expected initialization and completion times, a future period of downtime in the system; and
scheduling one or more internal memory management operations on the memory device during the future period of downtime.
2 . The system of claim 1 , wherein the processing device is to perform operations further comprising:
detecting an occurrence of a scan ahead trigger event;
initiating a scan ahead operation of a plurality of command submission queues in a host system to read the plurality of pending command submission queue entries from the plurality of command submission queues; and
storing the respective indications of the plurality of pending command submission queue entries in the cache memory.
3 . The system of claim 2 , wherein the scan ahead operation reads the plurality of pending command submission queue entries before the plurality of pending command submission queue entries are retrieved according to a natural order defined by a submission queue arbitration scheme.
4 . The system of claim 2 , wherein the plurality of pending command submission queue entries represent a plurality of memory access commands issued by the host system and directed to the memory device.
5 . The system of claim 4 , wherein the expected initialization and completion times for the plurality of pending command submission queue entries are based on a type of the plurality of memory access commands, a number of the plurality of pending command submission queue entries in the plurality of command submission queues, and an expected execution time of memory access operations associated with the plurality of memory access commands.
6 . The system of claim 5 , wherein the future period of downtime comprises a period when the processing device is not executing the memory access operations associated with the plurality of memory access commands.
7 . The system of claim 1 , wherein the one or more internal memory management operations comprise a garbage collection operation.
8 . A method comprising:
analyzing respective indications of a plurality of pending command submission queue entries in a cache memory of a memory sub-system to determine expected initialization and completion times for the plurality of pending command submission queue entries;
determining, based on the expected initialization and completion times, a future period of downtime in the memory sub-system; and
scheduling, by a processing device, one or more internal memory management operations on a memory device of the memory sub-system during the future period of downtime.
9 . The method of claim 8 , further comprising:
detecting an occurrence of a scan ahead trigger event;
initiating a scan ahead operation of a plurality of command submission queues in a host system to read the plurality of pending command submission queue entries from the plurality of command submission queues; and
storing the respective indications of the plurality of pending command submission queue entries in the cache memory.
10 . The method of claim 9 , wherein the scan ahead operation reads the plurality of pending command submission queue entries before the plurality of pending command submission queue entries are retrieved according to a natural order defined by a submission queue arbitration scheme.
11 . The method of claim 9 , wherein the plurality of pending command submission queue entries represent a plurality of memory access commands issued by the host system and directed to the memory device.
12 . The method of claim 11 , wherein the expected initialization and completion times for the plurality of pending command submission queue entries are based on a type of the plurality of memory access commands, a number of the plurality of pending command submission queue entries in the plurality of command submission queues, and an expected execution time of memory access operations associated with the plurality of memory access commands.
13 . The method of claim 12 , wherein the future period of downtime comprises a period when the processing device is not executing the memory access operations associated with the plurality of memory access commands.
14 . The method of claim 8 , wherein the one or more internal memory management operations comprise a garbage collection operation.
15 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
analyzing respective indications of a plurality of pending command submission queue entries in a cache memory of a memory sub-system to determine expected initialization and completion times for the plurality of pending command submission queue entries;
determining, based on the expected initialization and completion times, a future period of downtime in the memory sub-system; and
scheduling one or more internal memory management operations on a memory device of the memory sub-system during the future period of downtime.
16 . The non-transitory computer-readable storage medium of claim 15 , wherein the instructions cause the processing device to perform operations further comprising:
detecting an occurrence of a scan ahead trigger event;
initiating a scan ahead operation of a plurality of command submission queues in a host system to read the plurality of pending command submission queue entries from the plurality of command submission queues; and
storing the respective indications of the plurality of pending command submission queue entries in the cache memory.
17 . The non-transitory computer-readable storage medium of claim 16 , wherein the scan ahead operation reads the plurality of pending command submission queue entries before the plurality of pending command submission queue entries are retrieved according to a natural order defined by a submission queue arbitration scheme.
18 . The non-transitory computer-readable storage medium of claim 16 , wherein the plurality of pending command submission queue entries represent a plurality of memory access commands issued by the host system and directed to the memory device.
19 . The non-transitory computer-readable storage medium of claim 18 , wherein the expected initialization and completion times for the plurality of pending command submission queue entries are based on a type of the plurality of memory access commands, a number of the plurality of pending command submission queue entries in the plurality of command submission queues, and an expected execution time of memory access operations associated with the plurality of memory access commands.
20 . The non-transitory computer-readable storage medium of claim 19 , wherein the future period of downtime comprises a period when the processing device is not executing the memory access operations associated with the plurality of memory access commands, and wherein the one or more internal memory management operations comprise a garbage collection operation.