Method and system for implementing binary arrays
View Patent ↗In one aspect, a computerized method includes the step of obtaining a binary array, wherein the binary array is utilized for a subsequent set of operations. The method includes the step of performing a dissolution coding on the binary array to yield a one or more generating functions. The method includes the step of codifying the one or more generating functions as a branch-free program to yield an optimal packing of the binary array.
1 . A computerized method comprising:
with at least one computer processor;
obtaining a binary array, wherein the binary array is utilized for a subsequent set of operations;
performing a dissolution coding on the binary array to yield a one or more generating functions; and
generating, by a code generator, an executable instruction sequence comprising a fixed number of machine instructions without conditional branches, the executable instruction sequence being configured to retrieve values from the binary array when executed by a processor,
wherein executing the executable instruction sequence retrieves values from the binary array while reducing cache-line fetches or memory traffic relative to a word-packed bitmap representation,
wherein the executable instruction sequence stores only a subset of the generating function values, and remaining values are computed at runtime by executing the executable instruction sequence without reconstructing the binary array,
wherein the executable instruction sequence is configured to reside in an instruction cache of the processor and to be executed using implicit instruction prefetching, and
wherein values of the binary array are retrieved at runtime by executing the executable instruction sequence without reconstructing or materializing the binary array in memory.
2 . The computerized method of claim 1 , wherein a plurality of transformation operations is applied to the binary array on a set of designed access patterns of the binary array.
3 . The computerized method of claim 2 , wherein a plurality of pre-processing operations is applied to the binary array on the set of designed access patterns of the binary array.
4 . The computerized method of claim 3 , wherein a plurality of pre-processing operations comprises a row or column reordering operations and a complementing the values of 1s and 0s operations.
5 . The computerized method of claim 1 , wherein the step of performing the dissolution coding on the binary array to yield one or more generating functions further comprises: extracting a set of {0, 1} bit strings of length N.
6 . The computerized method of claim 5 , wherein or each {0, 1} bitstring of length N, an index dissolution is performed.
7 . The computerized method of claim 6 , wherein or each {0, 1} bitstring of length N, a value dissolution is performed.
8 . The computerized method of claim 7 , wherein it is detected that there is no {0, 1} bit string left to be processed, and a routine returns back control to codify the one or more generating functions as a branch-free program to yield the optimal packing of the binary array.
9 . The computerized method of claim 1 , wherein there are two functions 4 and Θ.
10 . The computerized method of claim 9 , wherein a total amount of memory is utilized to store the {0, 1} bit string of the length N and an being equal to ω is: (ω+N/ω) bits.
11 . The computerized method of claim 10 , wherein a dissolution coding of the large binary array is provided in the form of the generating functions δ, θ, Δ and Θ.
12 . The computerized method of claim 11 , wherein a plurality of computations involved in the one or more generating functions are represented as a loop-free machine executable code for memory access locality.
13 . The computerized method of claim 12 , wherein given a binary array, the binary array is representing using the generating functions δ, θ, Δ and Θ.
14 . The computerized method of claim 13 , wherein a data cache is used an instruction cache on one or more processor cores by transforming the generating functions into the machine executable instructions.
15 . The computerized method of claim 14 , the generating functions δ, θ, Δ and Θ by converting a plurality of arithmetics of the generating functions δ, θ, Δ and Θ into a branch-free instruction or a loop-free instruction.
16 . The computerized method of claim 15 , wherein the code size is further reduced using a register blocking technique, using a 32-bit registers, and using a set of pre-fetched instructions to void a cache line pollution.
17 . The computerized method of claim 16 , wherein the binary array optimizes for efficient storage requirements, better computational performance and fast access times.
18 . The computerized method of claim 17 , wherein the binary array binary array comprises a collection of vectors of length ‘n’, where each vector has 0s and 1s as it's elements.
19 . The computerized method of claim 18 , wherein the subsequent set of operations comprises a data streaming transmission.
20 . The computerized method of claim 18 , wherein the subsequent set of operations comprises a compact representation of an artificial neural network.