IP Library Granted Patent US 12711012
Granted Patent B2
US 12711012 · App. 18/885,169 · Granted Aug 18, 2026

Methods, apparatuses, and systems for managing parity data generation in a memory system

Inventors: Xianwu Luo (Wuhan, CN); Jiangwei Shi (Wuhan, CN); Youxin He (Wuhan, CN)
Assignee: Yangtze Memory Technologies Co., Ltd.
G06F11/1056G06F11/1068
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Quick Facts
Patent No.
US 12711012
App. No.
18/885,169
Granted
Aug 18, 2026
Kind
B2
Abstract

Methods, systems, and computer-readable storage media for allocating memory space are provided. In one aspect, a method for operating a memory system includes writing data retrieved from a source block of a memory device of the memory system to a target block of the memory device. The method further includes, in response to determining a size of the data in the target block reaches a threshold, reading the data from the target block, generating parity data corresponding to the data, and writing the parity data to the target block.

Claims (29)

1 . A method of operating a memory system, comprising:

writing data retrieved from a source block of a memory device of the memory system to a target block of the memory device; and

in response to determining a size of the data in the target block reaches a threshold:

reading the data from the target block;

generating parity data corresponding to the data; and

writing the parity data to the target block.

2 . The method of claim 1 , wherein the target block comprises a first set of pages associated with a first word line and a second set of pages associated with a second word line, and wherein reading the data from the target block comprises:

reading first data from a first page of the first set of pages; and

reading second data from a first page of the second set of pages.

3 . The method of claim 2 , wherein the second word line is adjacent to the first word line in the memory device.

4 . The method of claim 2 , wherein generating parity data comprises generating first parity data, wherein generating the first parity data comprises:

performing a first exclusive OR (XOR) operation on the first data and the second data.

5 . The method of claim 4 , wherein a result of the first XOR operation is stored in a buffer of a memory controller of the memory system.

6 . The method of claim 5 , wherein the method further comprises reading third data from the source block,

wherein generating the first parity data comprises:

performing a second XOR operation on the third data and the result of the first XOR operation.

7 . The method of claim 4 , wherein reading the data from the target block comprises:

reading fourth data from a second page of the first set of pages; and

reading fifth data from a second page of the second set of pages, wherein the fourth data and the fifth data are read after writing the first parity data to the target block, and

wherein generating the parity data comprises generating second parity data, wherein generating the second parity data comprises:

performing a third XOR operation on the fourth data and the fifth data.

8 . The method of claim 1 , wherein reading the data from the target block comprises:

performing an error correction operation on the data using error correction codes.

9 . A memory system, comprising a memory device and a memory controller configured to control the memory device, wherein the memory system is configured to perform operations comprising:

writing data retrieved from a source block of the memory device to a target block of the memory device; and

in response to determining a size of the data in the target block reaches a threshold:

reading the data from the target block;

generating parity data corresponding to the data; and

writing the parity data to the target block.