IP Library Granted Patent US 12711055
Granted Patent B2
US 12711055 · App. 18/982,336 · Granted Aug 18, 2026

Wordline group-based identification of good memory blocks during a programming operation

Inventors: Zhongguang Xu (San Jose, CA); Yang Liu (San Jose, CA); Lei Zhang (Singapore, SG); Hanping Chen (San Jose, CA)
Assignee: Micron Technology, Inc.
G06F12/023
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Quick Facts
Patent No.
US 12711055
App. No.
18/982,336
Granted
Aug 18, 2026
Kind
B2
Abstract

A processing device in a memory sub-system receives a request to execute a programming operation to program a target portion of a memory array of a memory device. In response to the request, a target wordline group associated with the target portion of the memory array is identified. Information associated with the target wordline group is identified, where the information identifies a first good portion of the target wordline group and a second bad portion of the target wordline group. The programming operation is caused to be executed to program the first good portion of the target wordline group and skip programming of the second bad portion of the target wordline group.

Claims (34)

1 . A memory device comprising:

a memory array; and

control logic, operatively coupled with the memory array, to perform operations comprising:

receiving a request to execute a programming operation to program a target portion of the memory array;

in response to the request, identifying a target wordline group associated with the target portion of the memory array;

identifying information associated with the target wordline group, wherein the information identifies a first good portion of the target wordline group and address information associated with a second bad portion of the target wordline group; and

causing execution of the programming operation to program the first good portion of the target wordline group and using the address information associated with the second bad portion to selectively skip programming of the second bad portion of the target wordline group during the programming operation.

2 . The memory device of claim 1 , wherein the control logic is to perform further operations comprising performing a look-up operation of a data structure storing the information associated with the target wordline group.

3 . The memory device of claim 1 , wherein the information associated with the target wordline group is identified during a power up operation associated with the memory device.

4 . The memory device of claim 1 , wherein the target portion of the memory array corresponds to a first memory die and a second memory die of the memory device.

5 . The memory device of claim 4 , wherein the first memory die comprises a first set of memory planes and the second memory die comprises a second set of memory planes.

6 . The memory device of claim 5 , wherein the information comprises a block address and a plane address of the target wordline group.

7 . The memory device of claim 1 , wherein the information identifying the second bad portion of the target wordline group is stored in a data structure of the memory device.

8 . A method comprising:

receiving a request to execute a programming operation to program a target portion of a memory array of a memory device;

in response to the request, identifying a target wordline group associated with the target portion of the memory array;

identifying information associated with the target wordline group, wherein the information identifies a first good portion of the target wordline group and address information associated with a second bad portion of the target wordline group; and

causing execution of the programming operation to program the first good portion of the target wordline group and using the address information associated with the second bad portion to selectively skip programming of the second bad portion of the target wordline group during the programming operation.

9 . The method of claim 8 , further comprising performing a look-up operation of a data structure storing the information associated with the target wordline group.

10 . The method of claim 8 , wherein the information associated with the target wordline group is identified during a power up operation associated with the memory device.

11 . The method of claim 8 , wherein the target portion of the memory array corresponds to a first memory die and a second memory die of the memory device.

12 . The method of claim 11 , wherein the first memory die comprises a first set of memory planes and the second memory die comprises a second set of memory planes.

13 . The method of claim 12 , wherein the information comprises a block address and a plane address of the target wordline group.

14 . The method of claim 8 , wherein the information identifying the second bad portion of the target wordline group is stored in a data structure of the memory device.

15 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

receiving a request to execute a programming operation to program a target portion of a memory array of a memory device;

in response to the request, identifying a target wordline group associated with the target portion of the memory array;

identifying information associated with the target wordline group, wherein the information identifies a first good portion of the target wordline group and address information associated with a second bad portion of the target wordline group; and

causing execution of the programming operation to program the first good portion of the target wordline group and using the address information associated with the second bad portion to selectively skip programming of the second bad portion of the target wordline group during the programming operation.

16 . The non-transitory computer-readable storage medium of claim 15 , the operations further comprising performing a look-up operation of a data structure storing the information associated with the target wordline group.

17 . The non-transitory computer-readable storage medium of claim 15 , wherein the information associated with the target wordline group is identified during a power up operation associated with the memory device.

18 . The non-transitory computer-readable storage medium of claim 15 , wherein the target portion of the memory array corresponds to a first memory die and a second memory die of the memory device.

19 . The non-transitory computer-readable storage medium of claim 18 , wherein the first memory die comprises a first set of memory planes and the second memory die comprises a second set of memory planes, and wherein the information comprises a block address and a plane address of the target wordline group.

20 . The non-transitory computer-readable storage medium of claim 15 , wherein the information identifying the second bad portion of the target wordline group is stored in a data structure of the memory device.