In-NAND LLR generation

1 . A memory system for generation of log likelihood ratio LLR values, the system comprising:

a storage medium having therein a processor; and

a memory controller of the memory system configured to send a soft read command to the storage medium, wherein the memory controller of the memory system is coupled to the processor in the storage medium,

wherein the processor in the storage medium is triggered in response to the soft read command, and thereafter, from only one soft read command from the memory controller, reads pages of data stored in the storage medium and generate within the storage medium the LLR values.

2 . The memory system of claim 1 , wherein

the storage medium comprises a NAND device, and

the processor located in the NAND device comprises a soft read SR logic block and a LLR generation block.

3 . The memory system of claim 2 , wherein the LLR generation block comprises one or more look up tables containing the LLR values.

4 . The memory system of claim 3 , wherein the one or more look up tables each associates a read voltage bin with a specific LLR value.

5 . The memory system of claim 4 , wherein the read voltage bin comprises seven read voltages ranging from voltages for reading a “1” value to voltages for reading a “0” value.

6 . The memory system of claim 5 , wherein the soft read command specifies read threshold voltages R 0 -R 6 corresponding to the seven read voltages.

7 . The memory system of claim 6 , wherein the soft read command specifies which one of the look up tables in the LLR generation block is used for reading the LLR values.

8 . The memory system of claim 2 , wherein the SR logic block is configured to perform seven reads of the NAND, and the LLR generation block is configured to determine the LLR values for the seven reads using the look up tables.

9 . The memory system of claim 2 , wherein

the SR logic block comprises a decoder configured to decode data read from the storage medium using the LLR values, and

decoded data is transferred to the memory controller.

10 . The memory system of claim 9 , wherein the decoder comprises a low weight decoder configured to decode data read from the storage medium using the LLR values.

11 . A method for generation of log likelihood ratio LLR values for a storage medium, comprising:

sending a soft read command from a memory controller of a memory system to the storage medium, wherein the memory controller of the memory system is coupled to a processor in the storage medium;

in response to only one soft read command from the memory controller, reading pages of data stored in the storage medium by the processor in the storage medium; and

in response to the only one soft read command from the memory controller, generating within the storage medium the LLR values.

12 . The method of claim 11 , wherein the sending comprises sending a single soft read command to a NAND device comprising the storage medium.

13 . The method of claim 12 , wherein the generating comprises looking up the LLR values in one or more look up tables containing the LLR values.

14 . The method of claim 13 , further comprising associating a read voltage bin with a specific LLR value in one of the look up tables.

15 . The method of claim 14 , wherein the read voltage bin comprises seven read voltages ranging from voltages for reading a “1” value to voltages for reading a “0” value.

16 . The method of claim 15 , further comprising specifying in the soft read command read threshold voltages R 0 -R 6 corresponding to the seven read voltages.

17 . The method of claim 16 , further comprising specifying in the soft read command which one of the look up tables is used for reading the LLR values.

18 . The method of claim 17 , further comprising:

performing seven reads of the NAND device, and determining the LLR values for the seven reads using the look up tables.

19 . The method of claim 11 , further comprising:

using a decoder inside the storage medium to decode data read from the storage medium using the LLR values; and

transferring decoded data to the memory controller.

20 . The method of claim 19 , wherein using a decoder comprises using a low weight decoder to decode data read from the storage medium using the LLR values.