Firmware verification using parity information
Methods, systems, and apparatuses include reading a firmware image from a memory device. Parity data for the firmware image is computed. A first authentication code associated with the firmware image is received. A second authentication code is computed by performing a cryptographic operation on the parity data. It is determined that the first authentication code and the second authentication code match. The firmware image is loaded onto the memory device in response to determining that the first authentication code and the second authentication code match.
1 . A method comprising:
reading a firmware image from a memory device;
aggregating parity data for the firmware image;
receiving a first authentication code associated with the firmware image;
computing a second authentication code as a result of performing a cryptographic operation on the parity data;
determining the first authentication code and the second authentication code match; and
loading the firmware image onto the memory device in response to determining that the first authentication code and the second authentication code match.
2 . The method of claim 1 , wherein performing the cryptographic operation on the parity data comprises:
performing a hash operation on the parity data.
3 . The method of claim 2 , wherein performing the hash operation on the parity data uses a cryptographic key.
4 . The method of claim 1 , wherein detecting an uncorrectable error in the firmware image triggers a rejection of the firmware image.
5 . The method of claim 1 , wherein detecting an uncorrectable error in the first authentication code triggers a rejection of the firmware image.
6 . The method of claim 1 , wherein the firmware image comprises a plurality of portions, wherein reading the firmware image from the memory device comprises reading the plurality of portions, and wherein computing the parity data of the firmware image comprising computing a parity data portion for a portion of the plurality of portions.
7 . The method of claim 1 , wherein the parity data is a low-density parity check code and wherein computing the parity data comprises reading the low-density parity check code from the memory device.
8 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:
read a firmware image from a memory device;
aggregate parity data for the firmware image;
receive a first authentication code associated with the firmware image;
compute a second authentication code as a result of performing a cryptographic operation on the parity data;
determine the first authentication code and the second authentication code match; and
load the firmware image onto the memory device in response to determining that the first authentication code and the second authentication code match.
9 . The non-transitory computer-readable storage medium of claim 8 , wherein performing the cryptographic operation on the parity data comprises:
performing a hash operation on the parity data.
10 . The non-transitory computer-readable storage medium of claim 9 , wherein performing the hash operation on the parity data uses a cryptographic key.
11 . The non-transitory computer-readable storage medium of claim 8 , wherein detecting an uncorrectable error in the firmware image triggers a rejection of the firmware image.
12 . The non-transitory computer-readable storage medium of claim 8 , wherein detecting an uncorrectable error in the first authentication code triggers a rejection of the firmware image.
13 . The non-transitory computer-readable storage medium of claim 8 , wherein the firmware image comprises a plurality of portions, wherein reading the firmware image from the memory device comprises reading the plurality of portions, and wherein computing the parity data of the firmware image comprising computing a parity data portion for a portion of the plurality of portions.
14 . The non-transitory computer-readable storage medium of claim 8 , wherein the parity data is a low-density parity check code and wherein computing the parity data comprises reading the low-density parity check code from the memory device.
15 . A system comprising:
a plurality of memory devices; and
a processing device, operatively coupled with the plurality of memory devices, to:
read a firmware image from a memory device;
aggregate parity data for the firmware image;
receive a first authentication code associated with the firmware image;
compute a second authentication code as a result of performing a cryptographic hash operation on the parity data;
determine the first authentication code and the second authentication code match; and
load the firmware image onto the memory device in response to determining that the first authentication code and the second authentication code match.
16 . The system of claim 15 , wherein performing the cryptographic hash operation on the parity data uses a cryptographic key.
17 . The system of claim 15 , wherein detecting an uncorrectable error in the firmware image triggers a rejection of the firmware image.
18 . The system of claim 15 , wherein detecting an uncorrectable error in the first authentication code triggers a rejection of the firmware image.
19 . The system of claim 15 , wherein the firmware image comprises a plurality of portions, wherein reading the firmware image from the memory device comprises reading the plurality of portions, and wherein computing the parity data of the firmware image comprising computing a parity data portion for a portion of the plurality of portions.
20 . The system of claim 15 , wherein the parity data is a low-density parity check code and wherein computing the parity data comprises reading the low-density parity check code from the memory device.