Systems and methods for memory randomization

1 . A computer-implemented method for memory randomization during functional verification of user design model comprising a memory model, the computer-implemented method comprising:

encrypting write data according to a first key before a power cycle of the memory model, wherein the memory model is representative of a random access memory (RAM);

storing the encrypted write data at a respective memory location of the memory model;

removing or causing power to be removed from the memory model to power cycle the memory model;

providing or causing the power to be provided back to the memory model to power the memory model;

retrieving a second key that is different from the first key that was used to encrypt data stored in the memory model;

decrypting the encrypted write data stored at the respective memory location of the memory model using the second key so as to provide decoded data that is different from the write data in response to the memory model being powered back on, and so as to emulate a condition where the removing or causing power to be removed from the memory model caused the contents of the RAM to be lost and randomized;

evaluating the write data and the decoded data to determine whether a memory loss has occurred at the respective memory location of the memory model following the power cycle of the memory model,

wherein the evaluating comprises comparing the write data and the decoded data to determine whether the write data matches the decoded data;

retrieving the first key for encrypting the write data based on power domain data, the power domain data identifying a power domain that includes the memory model from a set of power domains for the user design model, and indicating that power is being provided to the power domain that includes the memory model,

wherein the first key for encrypting the write data is further retrieved based on key selection criteria, the key selection criteria identifying the first key, and that the power domain is currently being powered, and

wherein retrieving the second key for decrypting the encrypted write data is based on updated power domain data received in response to the power cycle, the updated power domain data identifying the power domain that includes the memory model, and indicating that power is not being currently being provided to the domain that includes the memory model, and

wherein the second key for decrypting the encrypted write data is further retrieved based on the key selection criteria, the key selection criteria identifying the second key, and that the power domain is not currently being powered, and

wherein the first and second keys are provided from a key register that comprises a plurality of keys including the first and second keys, and

wherein the first and second keys are selected from the key register based on the key selection criteria and the power domain data.

2 . The computer-implemented method of claim 1 , further comprising generating memory loss data indicating that a memory loss has occurred at the respective memory location of the memory model following the power cycle of the memory model based on the comparison indicating that the write data does not match the decoded data.

3 . The computer-implemented method of claim 1 , further comprising generating memory loss data indicating that a memory loss has not occurred at the respective memory location of the memory model following the power cycle of the memory model based on the comparison indicating that the write data matches the decoded data.

4 . The computer-implemented method of claim 1 , wherein each of the first and second keys is retrieved from a key register comprising a plurality of different keys.

5 . The computer-implemented method of claim 1 , wherein encrypting of the write data is performed using encryption logic that produces encrypted data using a selected key and decrypting is performed using decryption logic that produces decrypted data that is the same as the write data when the selected key is used for decrypting.

6 . A system comprising:

a non-transitory computer-readable medium configured to store data comprising a first key and a second key, and instructions;

a processor configured to access the non-transitory computer-readable medium and execute the instructions, the instructions comprising:

an emulation tool programmed to emulate a user design model comprising a memory model to emulate a functionality of the user design model, wherein the memory model is representative of a random access memory (RAM);

a random memory optimizer programmed to simulate data memory loss at the memory model during emulation of the user design model, the random memory optimizer being programmed to:

encrypt write data according to the first key for storage at a respective memory location of the memory model;

remove or cause power to be removed from the memory model to power cycle the memory model;

provide or cause the power to be provided back to the memory model to power the memory model;

retrieve the second key that is different from the first key that was used to encrypt data stored in the memory model; and

decrypt the encrypted data stored at the respective memory location of the memory model using the second key so as to provide decoded data that is different from the write data in response to the memory model being powered back on, and so as to emulate a condition where the removing or causing power to be removed from the memory model caused the contents of the RAM to be lost and randomized; and

a memory data evaluator that is programmed to:

evaluate the write data and the decoded data to determine whether a memory loss has occurred at the respective memory location of the memory model following the power cycle of the memory model; and

generate memory loss data indicating that a memory loss has occurred at the respective memory location of the memory model based on the evaluation indicating that the write data does not match the decoded data,

wherein the random memory optimizer comprises:

encrypt logic programmed to retrieve the first key based on power domain data, the power domain data identifying a power domain that includes the memory model from a set of power domains for the user design model, and indicating that power is being provided to the power domain that includes the memory model,

the encrypt logic being further programmed to retrieve the first key based on key selection criteria, the key selection criteria identifying the first key, and that the power domain is currently being powered,

the encrypt logic being further programmed to encrypt the write data according to the first key and store the encrypted write data at the respective memory location of the memory model;

decode logic programmed to retrieve the second key based on updated power domain data received in response to the power cycle, the updated power domain data identifying the power domain that includes the memory model, and indicating that power is not being provided to the power domain that includes the memory model,

the decode logic being further programmed to retrieve the second key based on key selection criteria, the key selection criteria identifying the second key, and that the power domain is not currently being powered,

the decode logic being further programmed to decrypt the encrypted data stored at the respective memory location of the memory model using the second key to provide the decoded data in response to the memory model being powered back; and

key output logic programmed to provide the first and second keys,

wherein the key output logic comprises:

a key register comprising a plurality of different keys that include the first and second keys; and

a key selector being programmed to select one of the first and second keys based on key selection criteria and power domain data.

7 . The system of claim 6 , wherein the memory model is representative of a random access memory (RAM) model.