Optimal qubit routing using double stochastic matrices

1 . A computer program product for building a quantum circuit, the computer program product comprising:

one or more computer readable storage media, and program instructions collectively stored on the one or more computer readable storage media, the program instructions comprising:

receiving, by a computer processor, a plurality of qubits and an initial input circuit layer, including one or more of the plurality of qubits;

extracting layers of quantum sub-circuits from the initial input circuit layer;

building adjacency matrices for the layers of quantum sub-circuits;

determining a cost function for one or more of the extracted layers, based on one or more doubly stochastic matrices of values representing placements of swap gates in the quantum sub-circuits;

selecting a final quantum circuit topology based on the cost function for the one or more extracted layers; and

performing the quantum circuit using the final quantum circuit topology, on a quantum computer.

2 . The computer program product of claim 1 , wherein the program instructions further comprise determining the cost function for permutations of each of the one or more extracted layers at discrete timesteps.

3 . The computer program product of claim 1 , wherein the doubly stochastic matrices represent a linear combination of permutations of each of the one or more extracted layers, at different timesteps for the extracted layers.

4 . The computer program product of claim 1 , wherein the cost function is based on minimizing a circuit depth of the final quantum circuit topology.

5 . The computer program product of claim 1 , wherein the program instructions further comprise building adjacency matrices for hardware couplings in the quantum sub-circuits.

6 . The computer program product of claim 1 , wherein the cost function is based on a number of constraints violations determined by the one or more doubly stochastic matrices.

7 . The computer program product of claim 1 , wherein the layers of quantum sub-circuits are commuting two-qubit gates.

8 . A computer implemented method for building a quantum circuit, comprising:

receiving, by a computer processor operating a prediction engine, data from one or more software containers, wherein the data includes operations from one or more software applications in the software containers;

receiving, by the computer processor, a plurality of qubits and an initial input circuit layer, including one or more of the plurality of qubits;

extracting layers of quantum sub-circuits from the initial input circuit layer;

building adjacency matrices for the layers of quantum sub-circuits;

determining a cost function for one or more of the extracted layers, based on one or more doubly stochastic matrices of values representing placements of swap gates in the quantum sub-circuits; and

selecting a final quantum circuit topology based on the cost function for the one or more extracted layers.

9 . The method of claim 8 , further comprising determining the cost function for permutations of each of the one or more extracted layers at discrete timesteps.

10 . The method of claim 8 , wherein the doubly stochastic matrices represent a linear combination of permutations of each of the one or more extracted layers, at different timesteps for the extracted layers.

11 . The method of claim 8 , wherein the cost function is based on minimizing a circuit depth of the final quantum circuit topology.

12 . The method of claim 8 , further comprising building adjacency matrices for hardware couplings in the quantum sub-circuits.

13 . The method of claim 8 , wherein the cost function is based on a number of constraints violations determined by the one or more doubly stochastic matrices.

14 . The method of claim 8 , wherein the layers of quantum sub-circuits are commuting two-qubit gates.

15 . A computing device configured to build a quantum circuit, comprising:

a processor operating a qubit routing engine; and

a memory coupled to the processor, the memory storing instructions to cause the processor to perform acts comprising:

receiving, by the processor, a plurality of qubits and an initial input circuit layer, including one or more of the plurality of qubits;

extracting layers of quantum sub-circuits from the initial input circuit layer;

building adjacency matrices for the layers of quantum sub-circuits;

determining a cost function for one or more of the extracted layers, based on one or more doubly stochastic matrices of values representing placements of swap gates in the quantum sub-circuits; and

selecting a final quantum circuit topology based on the cost function for the one or more extracted layers.

16 . The computing device of claim 15 , wherein the instructions cause the processor to perform a further act comprising determining the cost function for permutations of each of the one or more extracted layers at discrete timesteps.

17 . The computing device of claim 15 , wherein the doubly stochastic matrices represent a linear combination of permutations of each of the one or more extracted layers, at different timesteps for the extracted layers.

18 . The computing device of claim 15 , wherein the cost function is based on minimizing a circuit depth of the final quantum circuit topology.

19 . The computing device of claim 15 , wherein the instructions cause the processor to perform a further act comprising building adjacency matrices for hardware couplings in the quantum sub-circuits.

20 . The computing device of claim 15 , wherein the cost function is based on a number of constraints violations determined by the one or more doubly stochastic matrices.