IP Library Granted Patent US 12711294
Granted Patent B2
US 12711294 · App. 18/134,311 · Granted Aug 18, 2026

Simulation system for a cylindrical 3-dimensional semiconductor device using a hybrid mesh and method thereof

Inventors: Sung Min Hong (Gwangju, KR); Geon-Tae Jang (Gwangju, KR)
Assignee: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
G06F30/3308G06F2111/10
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Quick Facts
Patent No.
US 12711294
App. No.
18/134,311
Filed
Apr 13, 2023
Granted
Aug 18, 2026
Kind
B2
Art Unit
2851
USPC
716/100
Abstract

Provided is a semiconductor device simulation system and method. The simulation system includes; a device structure file input module configured to receive a plurality of device structure files for a plurality of sub-devices obtained by dividing a semiconductor device to be simulated; a connection relationship extraction module configured to extract connection relationships between the device structure files for the sub-devices; an interface condition application module configured to apply interface conditions to interface points of the device structure files according to the extracted connection relationships; and a simulation module configured to simulate an operation of the semiconductor device using the device structure files for the sub-devices and the interface conditions at interface points of adjacent sub-devices. The simulation system can simulate the semiconductor device using a plurality of device structure files for the sub-devices.

Claims (35)

1 . A 3D semiconductor device simulation system comprising;

a device structure file input module configured to receive a plurality of device structure files for a plurality of sub-devices obtained by dividing a semiconductor device to be simulated;

a connection relationship extraction module configured to extract connection relationships between the device structure files for the sub-devices;

an interface condition application module configured to apply interface conditions to interface points of the device structure files according to the extracted connection relationships; and

a simulation module configured to simulate an operation of the semiconductor device using the device structure files for the sub-devices and the interface conditions at interface points of adjacent sub-devices,

wherein the 3D semiconductor device simulation system is configured to simulate the semiconductor device using a plurality of device structure files for the sub-devices, and

wherein the interface condition application module calculates equations for simulation for the sub-devices without considering the connection relationships, merges the calculated equations at interface points of interface surfaces for adjacent sub-devices to form a single equation, and solves the merged equations by applying the interface condition that all the interface point of the adjacent sub-devices have the same physical quantity.

2 . The 3D semiconductor device simulation system of claim 1 , wherein the semiconductor device is a three-dimensional (3D) cylindrical semiconductor device having a structure in which rotational symmetry is partially broken, and

the plurality of device structure files input to the device structure file input module include at least one cylindrical device structure file and at least one 3D device structure file for the 3D cylindrical semiconductor device.

3 . The 3D semiconductor device simulation system of claim 2 , wherein the cylindrical device structure file is a device structure file for a sub-device with rotational symmetry of the 3D cylindrical semiconductor device, and

the 3D device structure file is a device structure file for a sub-device without rotational symmetry of the 3D cylindrical semiconductor device.

4 . The 3D semiconductor device simulation system of claim 1 , wherein the connection relationships between the plurality of device structure files include information about the interface surfaces of the adjacent sub-devices, and are extracted by using the coordinate value information of the device structure files.

5 . A 3D semiconductor device simulation method comprising the following steps:

(a) receiving a plurality of device structure files for a plurality of sub-devices obtained by dividing a semiconductor device to be simulated;

(b) extracting connection relationships between a plurality of device structure files for the sub-devices;

(c) applying interface conditions to interface points of the device structure files according to the extracted connection relationships; and

(d) simulating an operation of the semiconductor device using the device structure files for the sub-devices and the interface conditions at interface points of adjacent sub-devices,

wherein the 3D semiconductor device simulation method is configured to simulate the semiconductor device using a plurality of device structure files for the sub-devices, and

wherein the step (d) comprises: calculating equations for simulation for the sub-devices without considering the connection relationships; merging the calculated equations at interface points of interface surfaces for adjacent sub-devices to form a single equation; and solving the merged equations by applying the interface condition that all the interface point of the adjacent sub-devices have the same physical quantity.

6 . The 3D semiconductor device simulation method of claim 5 , wherein the semiconductor device is a three-dimensional (3D) cylindrical semiconductor device whose rotational symmetry is partially broken, and

the plurality of device structure files input to the device structure file input module include at least one cylindrical device structure file and at least one 3D device structure file for the 3D cylindrical semiconductor device.

7 . The 3D semiconductor device simulation method of claim 6 , wherein the cylindrical device structure file is a device structure file for a sub-device with rotational symmetry of the 3D cylindrical semiconductor device, and

the 3D device structure file is a device structure file for a sub-device without rotational symmetry of the 3D cylindrical semiconductor device.

8 . The 3D semiconductor device simulation method of claim 5 , wherein the connection relationship between the plurality of device structure files include information about the interface surfaces of the adjacent sub-devices, and are extracted by using the coordinate value information of the device structure files.

9 . A non-transitory computer-readable and non-volatile storage device recoding a program that implement the 3D semiconductor device simulation method according to claim 5 so as to be executable by a processor of the apparatus for simulating a single semiconductor device using a plurality of device structure files for a plurality of sub-devices.

10 . A 3D semiconductor device simulation system comprising;

a device structure file input module configured to receive a plurality of device structure files for a plurality of sub-devices obtained by dividing a semiconductor device to be simulated;

a connection relationship extraction module configured to extract connection relationships between the device structure files for the sub-devices;

an interface condition application module configured to apply interface conditions to interface points of the device structure files according to the extracted connection relationships; and

a simulation module configured to simulate an operation of the semiconductor device using the device structure files for the sub-devices and the interface conditions at interface points of adjacent sub-devices,

wherein the 3D semiconductor device simulation system is configured to simulate the semiconductor device using a plurality of device structure files for the sub-devices, and

wherein the semiconductor device is a three-dimensional (3D) cylindrical semiconductor device having a structure in which rotational symmetry is partially broken, and

the plurality of device structure files input to the device structure file input module include at least one cylindrical device structure file and at least one 3D device structure file for the 3D cylindrical semiconductor device.

11 . The 3D semiconductor device simulation system of claim 10 , wherein the cylindrical device structure file is a device structure file for a sub-device with rotational symmetry of the 3D cylindrical semiconductor device, and

the 3D device structure file is a device structure file for a sub-device without rotational symmetry of the 3D cylindrical semiconductor device.