Electronic device and method for controlling electronic device

1 . An electronic device comprising:

a memory storing first input data and first weight data used in operations of a neural network model; and

a processor configured to:

input the first input data and the first weight data into a first module implemented as hardware logic, and acquire second input data and second weight data, wherein a part of the first input data is truncated, and wherein a part of the first weight data is truncated,

input the second input data and the second weight data into a second module implemented as a hardware module comprising a logic for performing multiplication operations, and acquire first output data, and

based on scaling factors of the first input data and the first weight data identified through the first module, convert the acquired first output data into a floating point form expressing a first bit as a unit scale and acquire second output data,

wherein the processor is further configured to:

sum up the scaling factors of the first input data and the first weight data identified through the first module and acquire a third scaling factor; and

input the third scaling factor and the first output data into a third module implemented as hardware logic and acquire the second output data,

wherein the third module is configured to:

convert the third scaling factor into an index scale expressed in units of the first bit;

truncate at least one of lower bits in the first output data based on the index scale; and

add a guard bit as far as the truncated lower bits and generate the second output data in the floating point form, and

wherein the floating point form comprises:

a sign bit;

an index scale field representing a scale expressed in units of the first bit; and

a mantissa field having a fixed-point structure comprising at least one guard bit.

2 . The electronic device of claim 1 ,

wherein the processor is further configured to:

through the first module, based on a most significant bit (MSB) of the first input data, identify a highest bit including an effective value in a higher second bit, and, based on the identified highest bit, identify a scaling factor indicating a lower bit to be truncated based on a least significant bit (LSB) of the first input data, and truncate the part of the first input data based on the scaling factor.

3 . The electronic device of claim 1 ,

wherein the processor is configured to:

through the first module, identify a first highest bit including an effective value in a second bit of the first input data, identify a third bit located further than the first highest bit, bit, and identify a difference between the second bit and the third bit as a first scaling factor corresponding to the first input data, and

through the first module, identify a second highest bit including the effective value in the second bit of the first weight data, identify a fourth bit located further than the second highest bit, and identify a difference between the second bit and the fourth bit as a second scaling factor corresponding to the first weight data.

4 . The electronic device of claim 3 ,

wherein the processor is further configured to:

through the first module, truncate data corresponding to the third bit and data corresponding to the first scaling factor in the first input data, and acquire the second input data, and

through the first module, truncate data corresponding to the fourth bit and data corresponding to the second scaling factor in the first weight data, and acquire the second weight data.

5 . The electronic device of claim 3 ,

wherein the processor is further configured to:

identify a type of a result to be output through the neural network model,

identify an operation accuracy necessary for outputting the result of the identified type, and

when the identified operation accuracy is high, determine a size of the second bit as a first value, and when the identified operation accuracy is low, determine the size of the second bit as a second value that is larger than the first value.

6 . The electronic device of claim 1 ,

wherein the processor is further configured to, through the third module:

convert the third scaling factor into the unit scale form, and based on the converted unit scale form, truncate a lower fifth bit based on the LSB in the first output data, and add a guard bit as far as the truncated fifth bit and output the second output data.

7 . The electronic device of claim 1 ,

wherein the memory includes a buffer storing output data, and

the processor is further configured to:

input the second output data and third output data prestored in the buffer into a fourth module and acquire fourth output data where the second output data and the third output data were added.

8 . The electronic device of claim 7 ,

wherein the processor is further configured to, through the fourth module:

identify a unit scaling factor in a larger size between a first unit scaling factor of the second output data and a second unit scaling factor of the third output data, align unit scales of the second output data and the third output data as the identified unit scaling factor in a larger size, and add the second output data and the third output data of which the unit scaling factors were aligned and output the fourth output data.

9 . The electronic device of claim 7 ,

wherein the processor is further configured to:

normalize the acquired fourth output data to be converted into a floating point form expressing the first bit as a unit scale, and

store the normalized data in the buffer.

10 . A method for controlling an electronic device comprising a memory storing first input data and first weight data used in operations of a neural network model, the method comprising:

inputting the first input data and the first weight data into a first module implemented as hardware logic and acquiring second input data and second weight data, wherein a part of the first input data is truncated and wherein a part of the first weight data is truncated;

inputting the second input data and the second weight data into a second module implemented as a hardware module comprising logic for performing multiplication operations and acquiring first output data; and

based on scaling factors of the first input data and the first weight data identified through the first module, converting the acquired first output data into a floating point form expressing a first bit as a unit scale and acquiring second output data,

wherein converting the acquired first output data into the floating point form further comprises:

summing up the scaling factors of the first input data and the first weight data identified through the first module and acquiring a third scaling factor; and

inputting the third scaling factor and the first output data into a third module implemented as hardware logic and acquiring the second output data,

wherein the third module is configured to:

convert the third scaling factor into an index scale expressed in units of the first bit;

truncate at least one of lower bits in the first output data based on the index scale; and

add a guard bit as far as the truncated lower bits and generate the second output data in the floating point form, and

wherein the floating point form comprises:

a sign bit;

an index scale field representing a scale expressed in units of the first bit, and

a mantissa field having a fixed-point structure comprising at least one guard bit.

11 . The controlling method of claim 10 , further comprising, through the first module,

based on a most significant bit (MSB) of the first input data, identifying a highest bit including an effective value in a higher second bit, and based on the identified highest bit, identifying a scaling factor indicating a lower bit to be truncated based on a least significant bit (LSB) of the first input data, and truncating the part of the first input data based on the scaling factor.

12 . The controlling method of claim 10 ,

wherein the acquiring second input data and second weight data comprises:

through the first module, identifying a first highest bit including an effective value in a second bit of the first input data, identifying a third bit located further than the first highest bit, and identifying a difference between the second bit and the third bit as a first scaling factor corresponding to the first input data; and

through the first module, identifying a second highest bit including the effective value in the second bit of the first input data, identifying a fourth bit located further than the second highest bit, and identifying a difference between the second bit and the fourth bit as a second scaling factor corresponding to the first weight data.

13 . The controlling method of claim 12 ,

wherein the acquiring second input data and second weight data comprises:

through the first module, truncating data corresponding to the third bit and data corresponding to the first scaling factor in the first input data and acquiring the second input data; and

through the first module, truncating data corresponding to the fourth bit and data corresponding to the second scaling factor in the first weight data and acquiring the second weight data.

14 . The controlling method of claim 12 , further comprising:

identifying a type of a result to be output through the neural network model;

identifying an operation accuracy necessary for outputting the result of the identified type; and

when the identified operation accuracy is high, determining a size of the second bit as a first value, and when the identified operation accuracy is low, determining the size of the second bit as a second value that is larger than the first value.