Neuromorphic device having three-dimensional stacked structure and method of fabricating the same

1 . A neuromorphic device comprising:

a neuron device formed on a substrate;

an interlayer insulating layer formed on the substrate to cover the neuron device;

a synapse device having a Schottky barrier transistor structure and vertically aligned with the neuron device, the synapse device having a Schottky barrier transistor structure and including a channel, a floating gate, a control gate for a synaptic operation, a source having a first Schottky junction with the channel, and a drain having a second Schottky junction with the channel; and

a vertical connection wiring formed in the interlayer insulating layer to electrically connect the neuron device and the synapse device,

wherein the neuron device includes a transistor device, the transistor device including a channel region, a source region, a drain region, a gate insulating layer, and a gate electrode, and

the vertical connection wiring is configured to electrically interconnect the source of the synapse device and the source region of the transistor device and the drain of the synapse device and the drain region of the transistor device are not electrically connected to each other.

2 . The neuromorphic device of claim 1 ,

wherein the first Schottky junction comprises a metal silicide formed between a first side surface of the channel and a metal constituting the source through a low temperature process,

wherein the second Schottky junction comprises a metal silicide formed between a second side surface of the channel and a metal constituting the drain through the low temperature process, and

wherein the low temperature process is performed at less than 500° C.

3 . The neuromorphic device of claim 1 , wherein the source and drain each include a silicide of at least one selected from a group consisting of tungsten, titanium, cobalt, nickel, erbium, ytterbium, samarium, yttrium, gadolinium, terbium, cerium, platinum, and iridium.

4 . The neuromorphic device of claim 1 , wherein the channel of the synapse device includes silicon.

5 . The neuromorphic device of claim 1 , wherein the synapse device further includes a first insulating layer disposed between the channel and the floating gate and a second insulating layer disposed between the floating gate and the control gate, and

at least one of the first and second insulating layers includes at least one selected from a group consisting of a silicon oxide, a silicon nitride, a silicon oxynitride, and a high-k material having a dielectric constant greater than 7.5.

6 . The neuromorphic device of claim 1 , wherein the floating gate of the synapse device includes a polycrystalline silicon layer, an amorphous silicon layer, a metal oxide layer, a silicon nitride layer, a silicon nanocrystal layer, a metal nanocrystal layer, a silicon oxide nanocrystal layer, a metal oxide nanocrystal layer, or a combination thereof.

7 . The neuromorphic device of claim 1 ,

wherein the synaptic operation includes inducing Fowler-Nordheim (F-N) tunnelling by applying a voltage to the floating gate so that a charge amount corresponding to an electrical conductivity is stored, and

the electrical conductivity exhibits an exponential response due to the Schottky junction and exhibits a logarithmic response due to the F-N tunnelling, such that the two responses offset each other.

8 . The neuromorphic device of claim 1 , wherein a footprint of the synapse device overlaps a footprint of the neuron device.

9 . A method of fabricating a neuromorphic device, comprising:

forming a neuron device on a substrate;

forming an interlayer insulating layer on the substrate to cover the neuron device;

forming a vertical connection wiring electrically connected to the neuron device in the interlayer insulating layer; and

forming a synapse device having a Schottky barrier transistor structure, vertically aligned with the neuron device on the interlayer insulating layer and electrically connected to the vertical connection wiring, the synapse device including a channel, a floating gate for a synaptic operation, a control gate, a source having a first Schottky junction with the channel, and a drain having a second Schottky junction with the channel,

wherein the neuron device includes a transistor device, the transistor device including a channel region, a source region, a drain region, a gate insulating layer, and a gate electrode, and

the vertical connection wiring is configured to electrically interconnect the source of the synapse device and the source region of the transistor device and the drain of the synapse device and the drain region of the transistor device are not electrically connected to each other.

10 . The method of fabricating a neuromorphic device of claim 9 , wherein the forming of the synapse device includes:

forming a metal layer bonded to first and second side surfaces of the channel; and

forming the first and second Schottky junctions by performing a heat treatment process to change portions of the metal layer adjoining the first and second side surfaces of the channel into a metal silicide.

11 . The method of fabricating a neuromorphic device of claim 10 , wherein the forming of the synapse device includes:

after forming the first and second Schottky junctions, removing a portion of the metal layer which has not been changed into the metal silicide.

12 . The method of fabricating a neuromorphic device of claim 10 , wherein the heat treatment process is performed at a temperature of less than 500° C.

13 . The method of fabricating a neuromorphic device of claim 10 , wherein the heat treatment process is performed using rapid thermal annealing (RTA), furnace annealing, laser annealing, or a combination thereof.

14 . The method of fabricating a neuromorphic device having a three-dimensional stacked structure of claim 10 , wherein the metal layer includes at least one selected from a group consisting of tungsten, titanium, cobalt, nickel, erbium, ytterbium, samarium, yttrium, gadolinium, terbium, cerium, platinum, and iridium.

15 . The method of fabricating a neuromorphic device of claim 10 , wherein, before the forming of the metal layer, the forming of the synapse device further includes:

forming a channel material layer on the interlayer insulating layer;

forming a gate stack including the floating gate and the control gate on the channel material layer; and

forming the channel from the channel material layer by etching portions of the channel material layer on first and second sides of the gate stack.

16 . The method of fabricating a neuromorphic device of claim 9 ,

wherein the synaptic operation includes inducing Fowler-Nordheim (F-N) tunnelling by applying a voltage to the floating gate so that a charge amount corresponding to an electrical conductivity is stored, and

the electrical conductivity exhibits an exponential response due to the Schottky junction and exhibits a logarithmic response due to the F-N tunnelling, such that the two responses offset each other.

17 . The method of fabricating a neuromorphic device of claim 9 , wherein a footprint of the synapse device overlaps a footprint of the neuron device.