IP Library Granted Patent US 12711900
Granted Patent B2
US 12711900 · App. 18/757,470 · Granted Aug 18, 2026

Pixel circuit, display panel, and display apparatus

Inventor: Yingteng Zhai (Xiamen, CN)
Assignee: Tianma Advanced Display Technology Institute (Xiamen) Co., Ltd.
G09G3/32G09G2310/061G09G2310/08G09G2320/0233G09G2320/0247
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Quick Facts
Patent No.
US 12711900
App. No.
18/757,470
Granted
Aug 18, 2026
Kind
B2
Abstract

A pixel circuit, a display panel, and a display apparatus are provided. The pixel circuit includes a first driving circuit, a second driving circuit, and a first capacitor. The first capacitor includes a first plate electrically connected to an output terminal of the first driving circuit and a second plate electrically connected to the second driving circuit. The first driving circuit is configured to generate a control current based on a first data signal, and the second driving circuit is configured to generate a driving current based on a second data signal and control a flowing period of the driving current based on the control current. A light-emitting element is electrically connected to the second driving circuit to receive the driving current.

Claims (41)

1 . A pixel circuit, comprising: a first driving circuit, a second driving circuit, and a first capacitor,

wherein the first capacitor comprises a first plate electrically connected to an output terminal of the first driving circuit and a second plate electrically connected to the second driving circuit;

wherein the first driving circuit is configured to generate a control current based on a first data signal, and the second driving circuit is configured to generate a driving current based on a second data signal and control a flowing period of the driving current based on the control current;

wherein a light-emitting element is electrically connected to the second driving circuit to receive the driving current;

wherein the first plate of the first capacitor and the output terminal of the first driving circuit are electrically connected to a first node;

the pixel circuit further comprises a second capacitor electrically connected to the first node;

the second driving circuit comprises a first driving transistor, wherein the first driving transistor is configured to generate the driving current under control of a gate voltage of the first driving transistor, and a first terminal of the first driving transistor receives a first power voltage provided by a first power voltage line;

the pixel circuit further comprises a compensation module, wherein the second capacitor comprises a first plate electrically connected to the first node and a second plate electrically connected to the compensation module; and

the compensation module is configured to write a reference voltage into the second plate of the second capacitor in a first period in which the second driving circuit operates, and write the first power voltage into the second plate of the second capacitor in a second period in which the second driving circuit operates, wherein the first period and the second period do not overlap in an operating cycle of the pixel circuit.

2 . The pixel circuit according to claim 1 , wherein the second driving circuit comprises a first driving transistor configured to generate the driving current under control of a gate voltage of the first driving transistor; and

the second plate of the first capacitor is electrically connected to a gate of the first driving transistor.

3 . The pixel circuit according to claim 1 , wherein a voltage value of the reference voltage is greater than or equal to a voltage value of the first power voltage.

4 . The pixel circuit according to claim 1 , wherein the first driving circuit comprises a second driving transistor and a third control transistor, wherein the third control transistor is connected between a second power voltage line and the second driving transistor; and

wherein a second power voltage provided by the second power voltage line is reused as the reference voltage.

5 . The pixel circuit according to claim 1 , wherein the compensation module comprises a first transistor and a second transistor,

wherein the first transistor comprises a gate connected to a first control signal line, a first electrode configured to receive the reference voltage, and a second electrode connected to the second plate of the second capacitor, wherein the first control signal line provides a first control signal; and the second transistor comprises a gate connected to a second control signal line, a first electrode connected to the first power voltage line, and a second electrode connected to the second plate of the second capacitor, wherein the second control signal line provides a second control signal.

6 . The pixel circuit according to claim 5 , wherein the first control signal and the second control signal are mutually phase-inverted signals.

7 . The pixel circuit according to claim 5 , wherein the first driving circuit comprises a second driving transistor and a first light-emitting control module, wherein the second driving transistor is configured to generate the control current under control of a gate voltage of the second driving transistor, the first light-emitting control module is connected in series with the second driving transistor, and a control terminal of the first light-emitting control module receives a first light-emitting control signal; and

the second driving circuit comprises a second light-emitting control module, wherein the second light-emitting control module is connected in series with the first driving transistor, and a control terminal of the second light-emitting control module receives a second light-emitting control signal,

wherein the second control signal is reused as the first light-emitting control signal, or the second control signal is reused as the second light-emitting control signal.

8 . The pixel circuit according to claim 5 , wherein the first driving circuit comprises a second driving transistor, a first control transistor, and a third control transistor, wherein the second driving transistor is connected between the first control transistor and the third control transistor, and a gate of the first control transistor receives the second control signal and/or a gate of the third control transistor receives the second control signal.

9 . A display panel, comprising a pixel circuit,

wherein the pixel circuit comprises: a first driving circuit, a second driving circuit, and a first capacitor,

wherein the first capacitor comprises a first plate electrically connected to an output terminal of the first driving circuit and a second plate electrically connected to the second driving circuit;

wherein the first driving circuit is configured to generate a control current based on a first data signal, and the second driving circuit is configured to generate a driving current based on a second data signal and control a flowing period of the driving current based on the control current;

wherein a light-emitting element is electrically connected to the second driving circuit to receive the driving current;

wherein the first plate of the first capacitor and the output terminal of the first driving circuit are electrically connected to a first node;

the pixel circuit further comprises a second capacitor electrically connected to the first node;

the second driving circuit comprises a first driving transistor, wherein the first driving transistor is configured to generate the driving current under control of a gate voltage of the first driving transistor, and a first terminal of the first driving transistor receives a first power voltage provided by a first power voltage line;

the pixel circuit further comprises a compensation module, wherein the second capacitor comprises a first plate electrically connected to the first node and a second plate electrically connected to the compensation module; and

the compensation module is configured to write a reference voltage into the second plate of the second capacitor in a first period in which the second driving circuit operates, and write the first power voltage into the second plate of the second capacitor in a second period in which the second driving circuit operates, wherein the first period and the second period do not overlap in an operating cycle of the pixel circuit.

10 . A display apparatus, comprising a display panel, wherein the display panel comprises a pixel circuit,

wherein the pixel circuit comprises: a first driving circuit, a second driving circuit, and a first capacitor,

wherein the first capacitor comprises a first plate electrically connected to an output terminal of the first driving circuit and a second plate electrically connected to the second driving circuit;

wherein the first driving circuit is configured to generate a control current based on a first data signal, and the second driving circuit is configured to generate a driving current based on a second data signal and control a flowing period of the driving current based on the control current;

wherein a light-emitting element is electrically connected to the second driving circuit to receive the driving current;

wherein the first plate of the first capacitor and the output terminal of the first driving circuit are electrically connected to a first node;

the pixel circuit further comprises a second capacitor electrically connected to the first node;

the second driving circuit comprises a first driving transistor, wherein the first driving transistor is configured to generate the driving current under control of a gate voltage of the first driving transistor, and a first terminal of the first driving transistor receives a first power voltage provided by a first power voltage line;

the pixel circuit further comprises a compensation module, wherein the second capacitor comprises a first plate electrically connected to the first node and a second plate electrically connected to the compensation module; and

the compensation module is configured to write a reference voltage into the second plate of the second capacitor in a first period in which the second driving circuit operates, and write the first power voltage into the second plate of the second capacitor in a second period in which the second driving circuit operates, wherein the first period and the second period do not overlap in an operating cycle of the pixel circuit.