Display device and electronic device having the same

1 . A display device, comprising:

a pixel including a light-emitting element; and

a sensor,

wherein the sensor includes:

a light-receiving element;

a first sensor transistor;

a second sensor transistor connected between a reset power line and a gate electrode of the first sensor transistor,

wherein the second sensor transistor includes a gate electrode connected to a reset control line;

a third sensor transistor connected between the first sensor transistor and a readout line,

wherein the third sensor transistor includes a gate electrode connected to a first scan line; and

a fourth sensor transistor connected between the gate electrode of the first sensor transistor and an anode electrode of the light-receiving element,

wherein the fourth sensor transistor includes a gate electrode connected to a gate line,

wherein the first scan line and the gate line are connected to each other.

2 . The display device of claim 1 , wherein the third sensor transistor is a p-type transistor, and the fourth sensor transistor is an n-type transistor.

3 . The display device of claim 2 , wherein the third sensor transistor includes a silicon semiconductor, and the fourth sensor transistor includes an oxide semiconductor.

4 . The display device of claim 2 , wherein the first sensor transistor is a p-type transistor, and the second sensor transistor is an n-type transistor.

5 . The display device of claim 1 , wherein the pixel further includes:

a first transistor that provides a driving current to the light-emitting element; and

a second transistor connected between a first electrode of the first transistor and a data line,

wherein a gate electrode of the second transistor is connected to the first scan line.

6 . The display device of claim 1 , further comprising:

a driving circuit,

wherein the driving circuit:

provides a reset signal having a logic high level to the reset control line at a first time point;

provides a first scan signal having a logic low level to the first scan line and the gate line at a second time point;

provides a gate signal to the first scan line and the gate line at a third time point, wherein the gate signal has the logic high level at the third time point; and

provides the gate signal to the first scan line and the gate line at a fourth time point, wherein the gate signal has the logic low level at the fourth time point,

wherein the first to fourth time points sequentially occur in a sensing cycle.

7 . The display device of claim 6 , wherein the driving circuit reads a first sensing signal through the readout line at the second time point, reads a second sensing signal through the readout line at the fourth time point, and performs a subtraction operation on the first sensing signal and the second sensing signal.

8 . The display device of claim 6 , further comprising:

a plurality of sensors including the sensor,

wherein the driving circuit commonly provides the reset signal to the plurality of sensors, and sequentially provides the first scan signal to the plurality of sensors in units of horizontal lines.

9 . The display device of claim 8 , wherein exposure times for the respective plurality of sensors between the third time point and the fourth time point are constant.

10 . The display device of claim 1 , wherein, in a plan view, a semiconductor layer of the second sensor transistor and a semiconductor layer of the fourth sensor transistor substantially extend in a second direction,

wherein, in the plan view, the first scan line and the gate line substantially extend in a first direction crossing the second direction.

11 . The display device of claim 10 , wherein, in the plan view, the first scan line includes a protruding portion that overlaps the semiconductor layer of the fourth sensor transistor,

wherein, in the plan view, the gate line overlaps the protruding portion of the first scan line.

12 . The display device of claim 10 , wherein, in a cross-sectional view, the semiconductor layer of the fourth sensor transistor is disposed between the first scan line and the gate line,

wherein, in the cross-sectional view, the gate line is in contact with the first scan line through a contact hole.

13 . A display device, comprising:

a pixel including a light-emitting element; and

a sensor,

wherein the sensor includes:

a light-receiving element;

a first sensor transistor;

a second sensor transistor connected between a reset power line and a gate electrode of the first sensor transistor,

wherein the second sensor transistor includes a gate electrode connected to a reset control line;

a third sensor transistor connected between the first sensor transistor and a readout line,

wherein the third sensor transistor includes a gate electrode connected to a first scan line; and

a fourth sensor transistor connected between the gate electrode of the first sensor transistor and an anode electrode of the light-receiving element,

wherein the fourth sensor transistor includes a gate electrode connected to a gate line,

wherein a first scan signal provided to the first scan line and a gate signal provided to the gate line have a same waveform.

14 . The display device of claim 13 , wherein the third sensor transistor is a p-type transistor, and the fourth sensor transistor is an n-type transistor.

15 . The display device of claim 14 , wherein the third sensor transistor includes a silicon semiconductor, and the fourth sensor transistor includes an oxide semiconductor.

16 . The display device of claim 13 , wherein the pixel further includes:

a first transistor that provides a driving current to the light-emitting element; and

a second transistor connected between a first electrode of the first transistor and a data line, and

wherein a gate electrode of the second transistor is connected to the first scan line.

17 . The display device of claim 13 , further comprising:

a driving circuit,

wherein the driving circuit:

provides a reset signal having a logic high level to the reset control line at a first time point;

provides the first scan signal to the first scan line and the gate line at a second time point, wherein the first scan signal has a logic low level at the second time point;

provides the gate signal to the first scan line and the gate line at a third time point, wherein the gate signal has the logic high level at the third time point; and

provides the gate signal to the first scan line and the gate line at a fourth time point, wherein the gate signal has the logic low level at the fourth time point,

wherein the first to fourth time points sequentially occur in a sensing cycle.

18 . The display device of claim 13 , wherein, in a plan view, a semiconductor layer of the second sensor transistor and a semiconductor layer of the fourth sensor transistor extend in a second direction,

wherein, in the plan view, the first scan line and the gate line extend while crossing the pixel in a first direction crossing the second direction.

19 . The display device of claim 18 , wherein, in the plan view, the gate line overlaps the first scan line.

20 . An electronic device, comprising:

a display device configured to display an image, based on input image data; and

a processor configured to provide the input image data to the display device,

wherein the display device includes:

a pixel including a light-emitting element; and

a sensor,

wherein the sensor includes:

a light-receiving element;

a first sensor transistor;

a second sensor transistor connected between a reset power line and a gate electrode of the first sensor transistor,

wherein the second sensor transistor includes a gate electrode connected to a reset control line;

a third sensor transistor connected between the first sensor transistor and a readout line,

wherein the third sensor transistor includes a gate electrode connected to a first scan line; and

a fourth sensor transistor connected between the gate electrode of the first sensor transistor and an anode electrode of the light-receiving element,

wherein the fourth sensor transistor includes a gate electrode connected to a gate line,

wherein the first scan line and the gate line are connected to each other.