Power management circuit and display device
The present disclosure provides a power management circuit and a display device that are capable of reducing power consumption based on a structure where at least one driving voltage supply circuit in the power management circuit is controlled to be deactivated during the period of at least one sub-frame.
1 . A display device comprising:
a display panel comprising a plurality of gate lines, a plurality of data lines, and a plurality of subpixels;
a data driving circuit configured to supply data voltages to the plurality of data lines;
a gate driving circuit configured to drive the plurality of gate lines;
a controller configured to supply image data corresponding to the data voltages to the data driving circuit and control the data driving circuit and the gate driving circuit; and
a power management circuit comprising a plurality of voltage conversion circuits, and a plurality of driving voltage supply circuits each configured to supply a driving voltage to at least one of the plurality of subpixels, the data driving circuit, the gate driving circuit, or the controller based on an input voltage supplied from a corresponding one of the plurality of voltage conversion circuits,
wherein the power management circuit is configured to cause a first driving voltage supply circuit configured to supply a first driving voltage to the data driving circuit among the plurality of driving voltage supply circuits to be deactivated during at least one first sub-frame in at least one frame corresponding to the image data.
2 . The display device of claim 1 , wherein the power management circuit is configured to cause a second driving voltage supply circuit configured to supply a second driving voltage to the data driving circuit among the plurality of driving voltage supply circuits to be deactivated during at least one second sub-frame in the at least one frame.
3 . The display device of claim 2 , wherein the at least one first sub-frame is an anode reset frame, and the at least one second sub-frame is a refresh frame.
4 . The display device of claim 2 , wherein the first driving voltage is a reference voltage for generating a gamma voltage in the data driving circuit, and the second driving voltage is a parking voltage supplied to the plurality of data lines by the data driving circuit during the at least one first sub-frame.
5 . The display device of claim 4 , wherein the first driving voltage supply circuit comprises:
a first reference voltage supply circuit configured to generate a reference voltage with a first voltage level and supply the reference voltage of the first voltage level to the data driving circuit; and
a second reference voltage supply circuit configured to generate a reference voltage with a second voltage level and supply the reference voltage of the second voltage level to the data driving circuit,
wherein the second voltage level is lower than the first voltage level.
6 . The display device of claim 2 , wherein the plurality of voltage conversion circuits comprise:
a first voltage conversion circuit configured to convert an initial voltage supplied from a system power source into a first input voltage and supply the first input voltage to the first driving voltage supply circuit; and
a second voltage conversion circuit configured to convert the initial voltage into a second input voltage and supply the second input voltage to the second driving voltage supply circuit.
7 . The display device of claim 6 , wherein the first voltage conversion circuit is configured to supply the first input voltage with a first voltage level during the at least one second sub-frame, and change the first voltage level of the first input voltage to the second voltage level less than the first voltage level during the at least one first sub-frame and supply the first input voltage with the second voltage level.
8 . The display device of claim 7 , wherein the first voltage conversion circuit is configured to receive a mode control signal from the controller, and operate in a force continuous current mode in at least one of a first voltage changing period during which the first input voltage is changed from the first voltage level to the second voltage level and a second voltage changing period during which the first input voltage is changed from the second voltage level to the first voltage level based on the mode control signal.
9 . The display device of claim 8 , wherein the mode control signal comprises a first control pulse and a second control pulse, and
wherein a pulse width of the first control pulse corresponds to a length of the first voltage changing period, and a pulse width of the second control pulse corresponds to a length of the second voltage changing period.
10 . The display device of claim 6 , wherein the plurality of voltage conversion circuits further comprise a third voltage conversion circuit configured to convert the initial voltage into a third input voltage, and
wherein the plurality of driving voltage supply circuits further comprise:
a third driving voltage supply circuit configured to receive at least one of the second input voltage or the third input voltage, generate at least one third driving voltage, and supply the at least one third driving voltage to a source node or a drain node of at least one transistor included in each of the plurality of subpixels; and
a fourth driving voltage supply circuit configured to receive at least one of the second input voltage and the third input voltage, generate at least one fourth driving voltage, and supply the at least one fourth driving voltage to the gate driving circuit.
11 . The display device of claim 10 , wherein the at least one third driving voltage comprises at least one of a bias voltage, an initialization voltage, or an anode reset voltage, and the at least one fourth driving voltage comprises at least one of a gate high voltage or a gate low voltage.
12 . The display device of claim 10 , wherein the gate driving circuit is configured to generate a gate signal to be supplied to a gate node of the at least one transistor through at least one gate line among the plurality of gate lines based on the at least one fourth driving voltage.
13 . The display device of claim 10 , wherein:
the first voltage conversion circuit is configured to supply the first input voltage with a first voltage level during the second sub-frame;
the second voltage conversion circuit is configured to supply the second input voltage with a third voltage level greater than the first voltage level during the at least one first sub-frame and the at least one second sub-frame; and
the third voltage conversion circuit is configured to supply the third input voltage with a fourth voltage level less than the first voltage level.
14 . The display device of claim 1 , wherein the plurality of voltage conversion circuits comprise at least one of a buck converter, a boost converter, or a buck-boost converter.
15 . A power management circuit comprising:
a first voltage conversion circuit configured to convert an initial voltage supplied from a system power supply into a first input voltage;
a second voltage conversion circuit configured to convert the initial voltage into a second input voltage;
a first driving voltage supply circuit configured to generate a first driving voltage based on the first input voltage and supply the first driving voltage to a data driving circuit, the first driving voltage supply circuit configured to be deactivated during at least one first sub-frame in at least one frame corresponding to image data supplied from a controller to the data driving circuit; and
a second driving voltage supply circuit configured to generate a second driving voltage based on the second input voltage and supply the second driving voltage to the data driving circuit, the second driving voltage supply circuit configured to be deactivated during at least one second sub-frame in the at least one frame.
16 . The power management circuit of claim 15 , wherein the first driving voltage supply circuit comprises:
a first driving amplifier configured to generate a first driving voltage based on the first input voltage; and
a first driving control transistor disposed between a first driving voltage line to which the first driving voltage is supplied and the first driving amplifier, and configured to cause the first driving amplifier to be deactivated during the at least one first sub-frame through a switching operation based on a first driving control signal supplied from the controller.
17 . The power management circuit of claim 16 , wherein the second driving voltage supply circuit comprises:
a second driving amplifier configured to generate a second driving voltage based on the second input voltage; and
a second driving control transistor disposed between a second driving voltage line to which the second driving voltage is supplied and the second driving amplifier, and configured to cause the second driving amplifier to be deactivated during the at least one second sub-frame through a switching operation based on a second driving control signal supplied from the controller.
18 . The power management circuit of claim 15 , wherein the first voltage conversion circuit is configured to supply the first input voltage with a first voltage level during the at least one second sub-frame and supply the first input voltage with a second voltage level less than the first voltage level during the at least one first sub-frame, and receive a mode control signal from the controller and operate in a force continuous current mode in at least one of a first voltage changing period during which the first input voltage is changed from the first voltage level to the second voltage level and a second voltage changing period during which the first input voltage is changed from the second voltage level to the first voltage level based on the mode control signal.
19 . The power management circuit of claim 18 , wherein the first voltage conversion circuit comprises:
a first transistor and a second transistor;
a current sensing circuit configured to detect a current at a node to which the first transistor and the second transistor are connected;
a mode control circuit configured to output a force continuous current mode driving signal for the operating in the force continuous current mode based on a current detection result of the current sensing circuit and the mode control signal; and
a switching control circuit configured to control switching operation of the first transistor and the second transistor based on the force continuous current mode driving signal.