Photonic content addressable memory
A photonic content addressable memory employs cross coupled optical inverters to provide a bistable element that can be set or reset and interrogated optically. Optical switches controlled by the state of the bistable element can compare that state to optically conveyed pattern bits providing a “wired OR” on an output line quickly indicating matching along a logical row of data so stored. The bistable element can be simultaneously interrogated with different search patterns using parallel banks of optical switches tuned to different frequencies.
1 . An optical content addressable memory comprising:
a set of memory cells each providing:
a first and a second optical switch each having an input and output determining a switch state, with the output of the first optical switch connected to the input of the second optical switch and the output of the second optical switch connected to the input of the first optical switch, each optical switch operating as an inverter to produce a bistable element;
a third and fourth optical switch each receiving an input determining a switch state, the input determined by the output of the first and second optical switches respectively;
a first and second content input line providing independent optical signals to the third and fourth optical switches respectively denoting a search pattern; and
a content output line receiving an optical signal from both of the third and fourth optical switches to provide a logical OR of those optical signals.
2 . The optical content addressable memory of claim 1 further including a fifth and sixth optical switch each receiving an input determined by an output of the first and second optical switches respectively;
a memory cell read line providing an optical signal to both of the fifth and sixth optical switches; and
a first and second memory cell output line receiving an optical signal from the fifth and sixth optical switches respectively to provide respective complementary outputs indicating a state of the bistable element.
3 . The optical content addressable memory of claim 1 further including multiple third optical switches each receiving an input determined by the output of the first optical switch and multiple fourth optical switches each receiving an input determined by the output of the second optical switch;
wherein each pair of a single third optical switch and single fourth optical switch receive first and second content input lines providing independent optical signals to different pairs denoting different search patterns;
wherein an independent content output line for each pair receives an optical signal from both of the third and fourth optical switches of the pair to provide a logical OR of those optical signals; and
wherein optical switches of each pair operate at different frequencies from operating frequencies of other pairs.
4 . The optical content addressable memory of claim 3 further including a frequency multiplexer receiving different search patterns to encode them in different frequencies to be simultaneously applied to the first and second content input lines allowing parallel interrogation of the bistable element according to different patterns.
5 . The optical content addressable memory of claim 1 wherein the set of memory cells are arrayed in logical rows and columns with memory cells of the rows sharing a common content output line and memory cells of each column sharing common first and second content input lines independent between columns.
6 . An optical content addressable memory comprising:
a set of memory cells each providing:
a first and a second optical switch each having an input and output, with the output of the first optical switch connected to the input of the second optical switch and the output of the second optical switch connected to the input of the first optical switch, each optical switch operating as an inverter to produce a bistable element;
a third and fourth optical switch each receiving an input determined by the output of the first and second optical switches respectively;
a first and second content input line providing independent optical signals to the third and fourth optical switches respectively denoting a search pattern; and
a content output line receiving an optical signal from both of the third and fourth optical switches to provide a logical OR of those optical signals;
further including a fifth and sixth optical switch each receiving an input determined by an output of the first and second optical switches respectively;
a memory cell read line providing an optical signal to both of the fifth and sixth optical switches;
a first and second memory cell output line receiving an optical signal from the fifth and sixth optical switches respectively to provide respective complementary outputs indicating a state of the bistable element; and
further including a seventh and eighth optical switch each providing a respective output to the inputs of the first and second optical switches;
a memory cell write line providing an optical signal to both of the seventh and eighth optical switches; and
a first and second memory cell input line providing respective and mutually complementary optical signals to the inputs of the first and second optical switches to override their states.
7 . The optical content addressable memory of claim 6 wherein the seventh and eighth optical switches operate at a first frequency different from a second frequency required for operation of the first and second optical switches.
8 . An optical content addressable memory comprising:
a set of memory cells each providing:
a first and a second optical switch each having an input and output, with the output of the first optical switch connected to the input of the second optical switch and the output of the second optical switch connected to the input of the first optical switch, each optical switch operating as an inverter to produce a bistable element;
a third and fourth optical switch each receiving an input determined by the output of the first and second optical switches respectively;
a first and second content input line providing independent optical signals to the third and fourth optical switches respectively denoting a search pattern; and
a content output line receiving an optical signal from both of the third and fourth optical switches to provide a logical OR of those optical signals;
wherein the first and second optical switches are hybrid electrical photonic devices.
9 . The optical content addressable memory of claim 8 wherein the first and second optical switches are an electrical photodetector providing an optical input and producing electrical output to control a microring optical resonator providing a switched output.
10 . The optical content addressable memory of claim 9 wherein the third and fourth optical switches provide an optical output as switched by a microring optical resonator receiving a tuning voltage from a photodetector and further including a semiconductor amplifier positioned between the photodetector and the microring optical resonator.
11 . The optical content addressable memory of claim 10 wherein the semiconductor amplifier is selected from the group consisting of a bipolar transistor and a field effect transistor.