Method for forming semiconductor device structure
A method for forming a semiconductor device structure is provided. The method includes placing a substrate including a material layer thereon in a plasma chamber. The plasma chamber includes a housing, a first electrode array including a plurality of first sub-electrodes, a plurality of first matching units each electrically connected to one of the first sub-electrodes, and a second electrode array disposed in the housing, the second electrode array including a plurality of second sub-electrodes. The method also includes supplying an etching gas into the plasma chamber and applying a first RF power source to the first sub-electrodes of the first electrode array by the first matching units to form an etching plasma from the etching gas. The method further includes adjusting a distance between each of the first sub-electrodes and the substrate to generate a plasma density distribution across the substrate.
1 . A method for forming a semiconductor device structure, comprising:
placing a substrate comprising a material layer thereon in a plasma chamber, wherein the plasma chamber comprises:
a housing;
a first electrode array disposed outside the housing, comprising a plurality of first sub-electrodes, wherein the plurality of first sub-electrodes comprise:
a first row of the plurality of first sub-electrodes substantially aligned in a first direction;
a second row of the plurality of first sub-electrodes substantially aligned in the first direction; and
a third row of the plurality of first sub-electrodes substantially aligned in the first direction, wherein each of the plurality of first sub-electrodes in the first row is substantially aligned with one of the plurality of first sub-electrodes in the second row and one of the plurality of first sub-electrodes in the third row in a second direction being orthogonal to the first direction;
a plurality of first matching units each electrically connected to one of the plurality of first sub-electrodes; and
a wafer support disposed in the housing, comprising:
a plurality of gas channels disposed in a top portion of the wafer support; and
a second electrode array disposed under the plurality of gas channels within the housing, the second electrode array comprising a plurality of second sub-electrodes, wherein the first electrode array and the second electrode array are each arranged in a matrix having the same number of rows and columns, each of the first sub-electrodes has a circular spiral shape winding around a central region to form multiple turns when seen from a top-view, and each of the second sub-electrodes has a circular shape corresponding to the first electrode array when seen from a top-view, wherein each of the circular spiral shape of each of the plurality of first sub-electrodes is encircled by an insulating material that conforms to the same circular spiral shape, winding around the central region and forming multiple turns;
supplying an etching gas into the plasma chamber;
applying a first RF power source to the plurality of first sub-electrodes of the first electrode array by the plurality of first matching units to form an etching plasma from the etching gas;
adjusting a first distance between a first one of the plurality of first sub-electrodes and the substrate to generate a first plasma density over a first region of the substrate and a second distance between a second one of the plurality of first sub-electrodes and the substrate to generate a second plasma density over a second region of the substrate, wherein the first plasma density is different from the second plasma density; and
performing an etching process on the material layer using the etching plasma to form a first trench in the first region of the substrate and a second trench in the second region of the substrate, wherein the first trench etched under the first plasma density and the second trench etched under the second plasma density have different widths and substantially equal depth.
2 . The method of claim 1 , further comprising:
applying a second RF power source to the plurality of second sub-electrodes of the second electrode array by a plurality of second matching units.
3 . The method of claim 1 , further comprising controlling an amount of RF power from the first RF power source by switching each of the plurality of first sub-electrodes to connect to ground or to the first RF power source.
4 . The method of claim 1 , wherein the plurality of first matching units are at an equal level and are connected to the plurality of first sub-electrodes by a plurality of first conductive lines, and adjusting the first distance and the second distance comprises adjusting a first length of a first one of the plurality of first conductive lines and a second length of a second one of the plurality of first conductive lines.
5 . The method of claim 1 , wherein a distance between a bottom surface of any of the plurality of first sub-electrodes and a top surface of the housing is outside the housing.
6 . The method of claim 1 , wherein there are three first sub-electrodes in the first row.
7 . The method of claim 1 , wherein the first region is closer to the housing than the second region, and the first plasma density is higher than the second plasma density.
8 . The method of claim 1 , further comprising cooling the substrate by a built-in cooling mechanism, wherein the built-in cooling mechanism comprises a cooling plate disposed under the second electrode array within the wafer support and a cooling fluid disposed in the cooling plate.
9 . The method of claim 1 , wherein the plasma chamber further comprises:
an electrostatic electrode embedded in the wafer support; and
a gas supply coupled to the gas channels for transferring heat generated by the electrostatic electrode to provide uniform temperature distribution.
10 . The method of claim 9 , wherein the electrostatic electrode is sandwiched between the second electrode array and the plurality of gas channels, and the plasma chamber further comprises a chuck power connected to the electrostatic electrode.
11 . The method of claim 2 , wherein the second sub-electrodes are positioned in closer proximity to the plurality of gas channels, while the second matching units are located at a greater distance from the plurality of gas channels.
12 . A method for forming a semiconductor device structure, comprising:
placing a substrate comprising a material layer thereon in a plasma chamber, wherein the plasma chamber comprises:
a housing comprising a gas inlet at a top portion of the housing and a gas outlet at a bottom portion of the housing;
a wafer support;
an electrostatic electrode disposed in the wafer support;
a first gas supply coupled to the wafer support;
a plurality of gas channels disposed in a top portion of the wafer support and connected to the first gas supply for transferring heat generated by the electrostatic electrode to provide uniform temperature distribution;
a first electrode array disposed outside the housing, comprising a plurality of first sub-electrodes arranged in a plurality of rows;
a plurality of first matching units each electrically connected to one of the plurality of first sub-electrodes; and
a second electrode array disposed in the housing, the second electrode array comprising a plurality of second sub-electrodes, wherein the first electrode array and the second electrode array are each arranged in a matrix having the same number of rows and columns, each of the first sub-electrodes has a circular spiral shape winding around a central region to form multiple turns when seen from a top-view, and each of the second sub-electrodes has a circular shape corresponding to the first electrode array when seen from a top-view, wherein each of the circular spiral shape of each of the plurality of first sub-electrodes is encircled by an insulating material that conforms to the same circular spiral shape, winding around the central region and forming multiple turns;
supplying an etching gas from a second gas supply that is coupled to the plasma chamber into the plasma chamber through the gas inlet;
applying a first RF power source to the plurality of first sub-electrodes of the first electrode array by the plurality of first matching units to form an etching plasma from the etching gas;
adjusting a first distance between a first one of the plurality of first sub-electrodes and the substrate to generate a first plasma density over a first region of the substrate and a second distance between a second one of the plurality of first sub-electrodes and the substrate to generate a second plasma density over a second region of the substrate, wherein the first plasma density is different from the second plasma density;
performing an etching process on the material layer using the etching plasma to form a first trench in the first region of the substrate and a second trench in the second region of the substrate, wherein the first trench etched under the first plasma density and the second trench etched under the second plasma density have different widths and substantially equal depth; and
evacuating chemical byproducts and unwanted reagents from the plasma chamber through the gas outlet.
13 . The method of claim 12 , further comprising applying a second RF power source to the plurality of second sub-electrodes of the second electrode array by a plurality of second matching units, wherein the plurality of second matching units are disposed in the wafer support.
14 . The method of claim 12 , wherein applying the first RF power source to the plurality of first sub-electrodes of the first electrode array further comprises applying different first RF power levels to the plurality of first sub-electrodes, wherein the first RF power levels have a high frequency ranging from about 1 MHz to about 100 MHz.
15 . A method for forming a semiconductor device structure, comprising:
placing a substrate comprising a material layer thereon in a plasma chamber, wherein the plasma chamber comprises:
a housing comprising a gas inlet;
a wafer support;
an electrostatic electrode disposed in the wafer support;
a first gas supply coupled to the wafer support;
a plurality of gas channels disposed in a top portion of the wafer support and connected to the first gas supply for transferring heat generated by the electrostatic electrode to provide uniform temperature distribution;
a first electrode array disposed outside the housing, comprising a plurality of first sub-electrodes arranged in a plurality of rows;
a plurality of first matching units each electrically connected to one of the plurality of first sub-electrodes; and
a second electrode array disposed in the housing, the second electrode array comprising a plurality of second sub-electrodes, wherein the first electrode array and the second electrode array are each arranged in a matrix having the same number of rows and columns, each of the first sub-electrodes has a circular spiral shape winding around a central region to form multiple turns when seen from a top-view, and each of the second sub-electrodes has a circular shape corresponding to the first electrode array when seen from a top-view, wherein each of the circular spiral shape of each of the plurality of first sub-electrodes is encircled by an insulating material that conforms to the same circular spiral shape, winding around the central region and forming multiple turns;
supplying an etching gas from a second gas supply that is coupled to the plasma chamber into the plasma chamber through the gas inlet;
applying a first RF power source to the plurality of first sub-electrodes of the first electrode array by the plurality of first matching units to form an etching plasma from the etching gas;
adjusting a first distance between a first one of the plurality of first sub-electrodes and the substrate to generate a first plasma density over a first region of the substrate and a second distance between a second one of the plurality of first sub-electrodes and the substrate to generate a second plasma density over a second region of the substrate, wherein the first plasma density is different from the second plasma density;
performing an etching process on the material layer using the etching plasma to form a first trench in the first region of the substrate and a second trench in the second region of the substrate, wherein the first trench etched under the first plasma density has a first width and a first depth, the second trench etched under the second plasma density has a second width and a second depth, the first width is different from the second width, and the first depth is substantially equal to the second depth; and
performing a cleaning process after the etching process by supplying a cleaning gas from the second gas supply into the plasma chamber through the gas inlet.
16 . The method of claim 15 , wherein the cleaning process is performed on an edge region of the substrate by applying the first RF power source to a portion of the first sub-electrodes located at an edge region of the first electrode array and configured to increase plasma density near the edge region of the substrate.
17 . The method of claim 15 , wherein the etching gas supplied by the second gas supply comprises fluorine-containing gas and an oxygen-containing gas, and the cleaning gas supplied by the second gas supply comprises fluorine-containing gas, inert gas, or a combination thereof.
18 . The method of claim 1 , wherein the circular shape of each of the second sub-electrodes is a formed as a continuous circular conductive structure without a gap.
19 . The method of claim 12 , wherein a horizontal span of the plurality of first sub-electrodes is greater than a horizontal span of the plurality of second sub-electrodes.
20 . The method of claim 15 , wherein the etching process is performed until an etching stop layer under the material layer is exposed, such that a bottom of the first trench is level with a bottom of the material layer.