RF blocker for uniformity control
A semiconductor processing system with improved plasma density is disclosed. The system includes a plasma chamber having a base, chamber walls and a top wall. An antenna is used to generate RF energy that is inductively coupled into the plasma chamber. The antenna comprises a plurality of coils that are proximate a dielectric window. One or more RF blockers are disposed adjacent to the dielectric window to block some of the RF energy from entering the plasma chamber. If the RF blocker is placed near a region of high plasma density, the density in that region may be reduced, improving the uniformity of the plasma density within the plasma chamber. Further, the RF blockers may have openings and may also be overlapped to create varying degrees of blocking.
1 . A semiconductor processing system, comprising:
a plasma chamber having:
a base;
chamber walls; and
a top wall; wherein at least one of the walls comprises a dielectric window;
an RF antenna comprising a plurality of coils disposed proximate the dielectric window to provide RF energy to the plasma chamber;
an RF power supply to provide power to the RF antenna;
a first RF blocker disposed adjacent to the dielectric window to block a portion of the RF energy;
wherein the first RF blocker includes one or more openings; and
a second RF blocker including one or more second openings, wherein the second RF blocker overlaps the first RF blocker to create an aggregate blocker.
2 . The semiconductor processing system of claim 1 , wherein the one or more second openings are partially aligned with the one or more openings, such that effective openings in the aggregate blocker are smaller than the openings.
3 . The semiconductor processing system of claim 1 , wherein the one or more second openings are anti-aligned with the one or more openings, such that the aggregate blocker has no openings.
4 . The semiconductor processing system of claim 1 , wherein the RF blocker is made of a dielectric material, a metal, or a semiconductor material.
5 . The semiconductor processing system of claim 1 , wherein the top wall comprises the dielectric window.
6 . The semiconductor processing system of claim 1 , wherein the top wall comprises a lower top surface, a vertical top surface and an upper top surface, and wherein at least one of the lower top surface and the cylindrical vertical top surface comprises the dielectric window.
7 . The semiconductor processing system of claim 1 , wherein the RF blocker is disposed between the plurality of coils and the dielectric window or between the dielectric window and a center of the plasma chamber.
8 . A semiconductor processing system, comprising:
a plasma chamber having:
a base;
chamber walls; and
a top wall; wherein at least one of the walls comprises a dielectric window;
an RF antenna comprising a plurality of coils disposed proximate the dielectric window to provide RF energy to the plasma chamber;
an RF power supply to provide power to the RF antenna;
an RF blocker disposed adjacent to the dielectric window to block a portion of the RF energy; wherein the RF blocker comprises internal channels adapted to allow a flow of a cooling fluid.
9 . The semiconductor processing system of claim 8 , wherein the RF blocker is made of a dielectric material, a metal, or a semiconductor material.
10 . The semiconductor processing system of claim 8 , wherein the RF blocker is disposed between the plurality of coils and the dielectric window or between the dielectric window and a center of the plasma chamber.