IP Library Granted Patent US 12712458
Granted Patent B2
US 12712458 · App. 18/595,738 · Granted Aug 18, 2026

Controller of an auxiliary switch used in a flyback circuit and control method thereof

Inventor: Xuefeng Chen (Hangzhou, CN)
Assignee: Hangzhou MPS Semiconductor Technology, Ltd.
H02M3/33515H02M1/0009H02M1/088H02M3/33523
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Quick Facts
Patent No.
US 12712458
App. No.
18/595,738
Granted
Aug 18, 2026
Kind
B2
Abstract

A controller for controlling auxiliary switch connected in series with a clamp capacitor to form an energy recycle branch in a flyback circuit. The controller has a power supply terminal to receive an external supply voltage, a sensing terminal connected to a first terminal of a current sense resistor which is connected in series with a primary switch, a ground terminal connected to a second terminal of the current sense resistor, a drive terminal connected to a control terminal of the auxiliary switch, and a turn on control circuit. Based on a logic state of a voltage at the power supply terminal and a voltage across the current sense resistor, the turn on control circuit provides a turn on control signal to control of the auxiliary switch.

Claims (62)

1 . A controller for controlling an auxiliary switch, the controller comprising:

a power supply terminal configured to receive an external supply voltage;

a sensing terminal configured to be coupled to a first terminal of a current sense resistor which is connected in series with a primary switch;

a ground terminal configured to be coupled to a second terminal of the current sense resistor;

a drive terminal configured to be coupled to a control terminal of the auxiliary switch; and

a turn on control circuit comprising:

a logic state judgement circuit coupled to the power supply terminal to receive a voltage at the power supply terminal, wherein when a duration the voltage at the power supply terminal being a logic high level is longer than a first pre-determined period, the logic state judgement circuit is configured to provide a trigger signal having a first level;

a turn on enable circuit coupled to the sensing terminal of the controller to receive a sensing signal representative of a voltage across the current sense resistor, wherein when the trigger signal is being the first level and the sensing signal is decreased to a first threshold voltage, the turn on enable circuit is configured to provide an enable signal having a first level; and

an enable logic circuit configured to allow the auxiliary switch to be turned on when the enable signal is being the first level and a falling-edge of the voltage at the power supply terminal comes.

2 . The controller of claim 1 , wherein the turn on enable circuit is configured to provide a reset signal having a turn on enable window when the sensing signal is increased to a second threshold voltage.

3 . The controller of claim 2 , wherein:

if the falling-edge of the voltage at the power supply terminal shows within the turn on enable window, the auxiliary switch is turned on after a dead time; and

if the falling-edge of the voltage at the power supply terminal is not shown within the turn on enable window, the enable signal is switched from the first level to a second level.

4 . The controller of claim 2 , wherein the first threshold voltage is less than the second threshold voltage which is less than zero and close to zero.

5 . The controller of claim 2 , wherein the turn on enable circuit comprises:

a first comparison circuit configured to compare the sensing signal and the first threshold voltage and to generate a first comparison signal;

an AND gate circuit having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is configured to receive the trigger signal, and the second input terminal is configured to receive the first comparison signal;

a second comparison circuit configured to compare the sensing signal with the second threshold voltage, to provide a second comparison signal;

a delay element configured to provide the reset signal by delaying the second comparison signal; and

a flip-flop having a set terminal, a reset terminal and an output terminal, wherein the set terminal is coupled to the output terminal of the AND gate circuit, the reset terminal is configured to receive the reset signal, and the flip-flop provides the enable signal at the output terminal.

6 . The controller of claim 1 , further comprises a setting terminal and an ON-time control circuit coupled to the setting terminal, wherein the setting terminal is configured to be coupled to an external resistor, and the ON-time control circuit is configured to limit an ON-time of the auxiliary switch in accordance with the resistance of the external resistor.

7 . A flyback circuit, comprising:

a primary switch coupled to the primary winding of a transformer via a current sense resistor;

an auxiliary switch coupled in series with a clamp capacitor to form an energy recycle branch; and

a controller, configured to control the auxiliary switch, comprising:

a power supply terminal configured to receive an external supply voltage;

a sensing terminal configured to be coupled to a first terminal of the current sense resistor;

a ground terminal configured to be coupled to a second terminal of the current sense resistor;

a drive terminal configured to be coupled to a control terminal of the auxiliary switch; and

a turn on control circuit comprising:

a logic state judgement circuit coupled to the power supply terminal to receive a voltage at the power supply terminal, wherein when a duration the voltage at the power supply terminal being a logic high level is longer than a first pre-determined period, the logic state judgement circuit provides a trigger signal having a first level;

a turn on enable circuit coupled to the sensing terminal to receive a sensing signal representative of a voltage across the current sense resistor, when the trigger signal is being the first level and the sensing signal is decreased to a first threshold voltage, the turn on enable circuit is configured to provide an enable signal having a first level; and

an enable logic circuit configured to allow the auxiliary switch to be turned on when the enable signal is being the first level and a falling-edge of the voltage at the power supply terminal comes.

8 . The flyback circuit of claim 7 , wherein the turn on enable circuit is configured to provide a reset signal with a turn on enable window when the sensing signal is increased to a second threshold voltage.

9 . The flyback circuit of claim 8 , wherein:

if the falling-edge of the voltage at the power supply terminal shows within the turn on enable window, the auxiliary switch is turned on after a dead time; and

if the falling-edge of the voltage at the power supply terminal is not shown within the turn on enable window, the enable signal is switched from the first level to a second level.

10 . The flyback circuit of claim 8 , wherein the first threshold voltage is less than the second threshold voltage which is less than and close to zero.

11 . The flyback circuit of claim 8 , wherein the turn on enable circuit comprising:

a first comparison circuit configured to compare the sensing signal and the first threshold voltage and to generate a first comparison signal;

an AND gate circuit having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is configured to receive the trigger signal, and the second input terminal is configured to receive the first comparison signal;

a second comparison circuit configured to compare the sensing signal with the second threshold voltage, to provide a second comparison signal; and

a delay element configured to provide the reset signal by delaying the second comparison signal; and

a flip-flop having a set terminal, a reset terminal and an output terminal, wherein the set terminal is coupled to the output terminal of the AND gate circuit, the reset terminal is configured to receive the reset signal, and the flip-flop provides the enable signal at the output terminal.

12 . The flyback circuit of claim 7 , further comprises a setting terminal and an ON-time control circuit coupled to the setting terminal, wherein the setting terminal is configured to be coupled to an external resistor, and the ON-time control circuit is configured to limit an ON-time of the auxiliary switch in accordance with the resistance of the external resistor.

13 . A control method for controlling an auxiliary switch, and the control method comprising:

receiving an external supply voltage at a power supply terminal of a controller;

coupling a sensing terminal of the controller to a first terminal of a current sense resistor;

coupling a ground terminal of the controller to a second terminal of the current sense resistor;

coupling a drive terminal of the controller to a control terminal of the auxiliary switch;

detecting the logic state of a voltage at the power supply terminal;

providing a trigger signal having a first level when a duration a voltage at the power supply terminal being a logic high level is longer than a first pre-determined period;

providing a sensing signal representative of a voltage across the current sense resistor;

providing an enable signal with a first level when the trigger signal is being the first level and the sensing signal decreases to a first threshold voltage; and

allowing the auxiliary switch to be turned on when the enable signal is being the first level and a falling-edge of the voltage at the power supply terminal comes.

14 . The control method of claim 13 , further comprising:

providing a reset signal with a turn on enable window when the sensing signal is increased to a second threshold voltage.

15 . The control method of claim 14 , wherein:

if the falling-edge of the voltage at the power supply terminal shows within the turn on enable window, the auxiliary switch is turned on after a dead time; and

if the falling-edge of the voltage at the power supply terminal is not shown within the turn on enable window, the enable signal is switched from the first level to a second level.

16 . The control method of claim 14 , wherein the first threshold voltage is less than the second threshold voltage.

17 . The control method of claim 14 , wherein the second threshold voltage is less than and close to zero.