Accurate frequency oscillators
Electronic oscillator designs and methods that do not require an accurate voltage and current reference to be provided, and which output an accurate frequency waveform over a range of voltage supply and temperature variations. Embodiments of the present invention are particularly well-suited for IC designs with very limited layout area and a tight oscillator frequency spread requirement. An embodiment uses a current subtraction technique that provides an essentially constant through a bias generation circuit when the voltage of the voltage source exceeds a selected value. An embodiment includes a temperature-compensation circuit, coupled to the bias generation circuit, that includes at least one NFET and at least one negative temperature coefficient resistor and is configured to pass a temperature-compensated current through the at least one NFET. An embodiment includes a ring oscillator that uses paired negative temperature coefficient resistors to provide temperature compensation for at least one ring oscillator stage.
1 . An oscillator, including:
a voltage supply variation reduction circuit configured to be coupled to a voltage source and to pass a first current when a voltage of the voltage source exceeds a selected value;
a bias generation circuit, coupled to the voltage supply variation reduction circuit and configured to be coupled to the voltage source, the bias generation circuit configured to pass a second current when the voltage of the voltage source exceeds the selected value, wherein the second current is essentially constant;
a temperature-compensation circuit that includes:
a diode-connected PFET having a conduction channel coupled to the voltage source;
a bias NFET having a conduction channel coupled to the conduction channel of the diode-connected PFET; and
a first zero temperature coefficient resistor and a first negative temperature coefficient resistor coupled in series between the conduction channel of the bias NFET and a reference potential,
wherein the temperature-compensation circuit is configured to pass a temperature-compensated third current through the bias NFET, and wherein the bias NFET has a positive temperature coefficient ON resistance, R ON ; and
oscillator circuitry coupled to the temperature-compensation circuit and configured to pass the temperature-compensated third current and generate an output comprising a periodic waveform.
2 . The oscillator of claim 1 , wherein the bias NFET has a negative temperature coefficient threshold voltage.
3 . The oscillator of claim 1 , wherein the first zero temperature coefficient resistor and the first negative temperature coefficient resistor have a total temperature coefficient adjustable between zero and a maximum negative temperature coefficient provided by the first negative temperature coefficient resistor alone.
4 . The oscillator of claim 1 , wherein the periodic waveform is substantially constant in frequency over variations in temperature.
5 . The oscillator of claim 1 , wherein the periodic waveform is substantially constant in frequency over variations of the voltage of the voltage source.
6 . The oscillator of claim 1 , wherein the periodic waveform is substantially constant in frequency over variations in temperature and variations of the voltage of the voltage source.
7 . The oscillator of claim 1 , wherein the voltage supply variation reduction circuit includes:
a second zero temperature coefficient resistor coupled to the voltage source;
a stack of diode-connected NFETs having conduction channels coupled in series between the second zero temperature coefficient resistor and the reference potential; and
an NFET coupled in a current mirror configuration to a diode-connected NFET in the stack of diode-connected NFETs.
8 . The oscillator of claim 7 , further including at least one bypass switch coupled in parallel with a corresponding diode-connected NFET in the stack of diode-connected NFETs.
9 . The oscillator of claim 1 , wherein the bias generation circuit includes:
a third zero temperature coefficient resistor coupled to the voltage source; and
a stack of diode-connected NFETs conduction channels coupled in series between the third zero temperature coefficient resistor and the reference potential.
10 . An oscillator, including:
a voltage supply variation reduction circuit configured to be coupled to a voltage source and to pass a first current when a voltage of the voltage source exceeds a selected value, the voltage supply variation reduction circuit including:
a first zero temperature coefficient resistor coupled to the voltage source;
a first stack of diode-connected NFETs having conduction channels coupled in series between the first zero temperature coefficient resistor and a reference potential; and
an NFET coupled in a current mirror configuration to a diode-connected NFET in the first stack of diode-connected NFETs; and
a bias generation circuit, coupled to the voltage supply variation reduction circuit and configured to be coupled to the voltage source, the bias generation circuit configured to pass a second current when the voltage of the voltage source exceeds the selected value, wherein the second current is essentially constant, the bias generation circuit including:
a second zero temperature coefficient resistor coupled to the voltage source; and
a second stack of diode-connected NFETs conduction channels coupled in series between the second zero temperature coefficient resistor and the reference potential, wherein the NFET coupled in the current mirror configuration has a conduction channel coupled between the reference potential and a node between the second zero temperature coefficient resistor and the second stack of diode-connected NFETs;
a temperature-compensation circuit, coupled to the bias generation circuit and configured to be coupled to the voltage source, the temperature-compensation circuit configured to pass a temperature-compensated third current through a bias NFET, the temperature-compensation circuit including:
a diode-connected PFET having a conduction channel coupled to the voltage source;
the bias NFET having a conduction channel coupled to the conduction channel of the diode-connected PFET; and
a third zero temperature coefficient resistor and a negative temperature coefficient resistor coupled in series between the conduction channel of the bias NFET and the reference potential; and
oscillator circuitry coupled to the temperature-compensation circuit and configured to pass the temperature-compensated third current and generate an output comprising a periodic waveform.
11 . The oscillator of claim 10 , further including at least one bypass switch coupled in parallel with a corresponding diode-connected NFET in the first stack of diode-connected NFETs.
12 . A ring oscillator, including an odd number of inverter stages coupled in series, at least one inverter stage including:
an output node;
a PFET having a conduction channel configured to be coupled to a voltage source;
an NFET having a conduction channel configured to be coupled to a reference potential;
an input coupled to a gate of the PFET and a gate of the NFET;
a first negative temperature coefficient resistor coupled between the conduction channel of the PFET and the output node;
a second negative temperature coefficient resistor coupled between the conduction channel of the NFET and the output node; and
a capacitor coupled to the output node and configured to be coupled to the reference potential.
13 . The ring oscillator of claim 12 , wherein the at least one inverter stage includes a NAND gate having one input configured to be coupled to an enable control signal.
14 . The ring oscillator of claim 12 , wherein the ring oscillator has five stages and at least four stages include the first and second negative temperature coefficient resistors.
15 . The ring oscillator of claim 12 , wherein the ring oscillator is integrated into an integrated circuit.
16 . The ring oscillator of claim 15 , wherein the integrated circuit is included within a cellular telephone.
17 . The ring oscillator of claim 15 , wherein the integrated circuit is included within a 5G wireless RF system.
18 . The oscillator of claim 1 , wherein the oscillator is integrated into an integrated circuit.
19 . The oscillator of claim 18 , wherein the oscillator is included within a cellular telephone.
20 . The oscillator of claim 18 , wherein the integrated circuit is included within a 5G wireless RF system.