Frequency control circuit and frequency control method

1 . A frequency control circuit comprising:

an output signal generation circuit configured to generate an output signal having a frequency according to a control signal; and

a frequency correction circuit configured to;

receive a preset target frequency value;

generate a frequency detection signal corresponding to a cycle of the output signal;

generate an output frequency value corresponding to the number of clocks of a reference clock signal included in one cycle of the output signal using the frequency detection signal;

compare the preset target frequency value with the output frequency value; and

generate the control signal for controlling a frequency of the output signal according to a comparison result.

2 . The frequency control circuit of claim 1 , wherein the frequency correction circuit includes:

a frequency detector configured to generate the frequency detection signal corresponding to the cycle of the output signal; and

an output frequency value provider configured to output the output frequency value corresponding to the cycle of the output signal using the frequency detection signal.

3 . The frequency control circuit of claim 2 , wherein the frequency detector is configured to:

generate pulses corresponding to rising edges of the output signal; and

provide pulses representing the cycle of the output signal as the frequency detection signal.

4 . The frequency control circuit of claim 2 , wherein the output frequency value provider is configured to:

receive a reference clock signal with a higher frequency than the output signal; and

output the output frequency value corresponding to the number of clocks of the reference clock signal included in the one cycle of the output signal using the frequency detection signal.

5 . The frequency control circuit of claim 4 , wherein:

the output frequency value provider is formed using a clock counter; and

the clock counter is configured to set the output frequency value to a preset initial value using the frequency detection signal and output the output frequency value corresponding to a result of counting the number of the clocks of the reference clock signal during the one cycle of the output signal.

6 . The frequency control circuit of claim 1 , wherein the frequency correction circuit includes a comparator configured to output the control signal corresponding to the comparison result.

7 . The frequency control circuit of claim 6 , wherein the comparator is configured to:

output the control signal for increasing the frequency of the output signal when the preset target frequency value is greater than the output frequency value; and

output the control signal for decreasing the frequency of the output signal when the preset target frequency value is less than the output frequency value.

8 . The frequency control circuit of claim 6 , wherein the comparator is configured to output the control signal for maintaining the frequency of the output signal when the preset target frequency value is the same as the output frequency value.

9 . The frequency control circuit of claim 1 , wherein the frequency correction circuit:

further includes a latch configured to latch the control signal; and

is configured to provide the control signal to the output signal generation circuit through the latch.

10 . The frequency control circuit of claim 1 , wherein the frequency correction circuit is configured to maintain the control signal at a previous level when entering a preset low power mode.

11 . A method of controlling a frequency comprising:

receiving a preset target frequency value;

generating a frequency detection signal corresponding to a cycle of an output signal;

generating an output frequency value corresponding to the number of clocks of a reference clock signal included in one cycle of the output signal using the frequency detection signal;

comparing the preset target frequency value with the output frequency value;

generating a control signal for controlling a frequency of the output signal according to a comparison result; and

generating the output signal having a frequency controlled according to the control signal.

12 . The method of claim 11 , wherein the generating the frequency detection signal includes generating pulses corresponding to rising edges of the output signal and providing pulses representing the cycle of the output signal as the frequency detection signal.

13 . The method of claim 11 , wherein the generating of the output frequency value includes:

receiving a reference clock signal with a higher frequency than the output signal; and

generating the output frequency value corresponding to the number of clocks of the reference clock signal included in the one cycle of the output signal using the frequency detection signal.

14 . The method of claim 11 , wherein the comparing the preset target frequency value with the output frequency value includes generating the control signal to increase the frequency of the output signal when the preset target frequency value is greater than the output frequency value as a comparison result.

15 . The method of claim 11 , wherein the comparing the preset target frequency value with the output frequency value includes generating the control signal to decrease the frequency of the output signal when the preset target frequency value is less than the output frequency value as a comparison result.

16 . The method of claim 11 , wherein the comparing the preset target frequency value with the output frequency value includes generating the control signal to maintain the frequency of the output signal when the preset target frequency value and the output frequency value are the same as a comparison result.

17 . The method of claim 11 , wherein, when a preset low power mode starts, the control signal is maintained at a previous level.