Polar coding for beam sweeping broadcast channel
According to some embodiments, a method in a wireless transmitter comprises: obtaining a first set of bits (comprising a non-time-varying component) for wireless transmission; concatenating a second set of bits (comprising a time-varying component (e.g., beam identifier)) to the first set of bits; encoding the concatenated first and second set of bits using a channel code; and transmitting the encoded bits to a wireless receiver. In some embodiments, transmitting the encoded bits to the wireless receiver comprises transmitting a first beam. The method may further comprise: concatenating a third set of bits (comprising a time-varying component (e.g., beam identifier)) to the first set of wireless bits; encoding the concatenated first and third set of bits using a channel code; and transmitting the encoded bits to a wireless receiver using a second beam.
1 . A method in a wireless transmitter, the method comprising:
obtaining a first set of bits for wireless transmission, the first set of bits comprising a non-time-varying component;
concatenating a second set of bits to the first set of bits, the second set of bits comprising a time-varying component, wherein the second set of bits is associated with system information;
determining cyclic redundancy check (CRC) bits for the concatenated first and second set of bits;
concatenating the determined CRC bits to the concatenated first and second set of bits, wherein the second set of bits is utilized twice, such that the second set of bits (i) is utilized within the CRC bits and (ii) is carried as a part of information bits within the concatenated CRC bits and the first and second set of bits;
encoding the concatenated first and second set of bits, and the determined CRC bits using a channel code; and
transmitting the encoded bits to a wireless receiver.
2 . A wireless transmitter comprising processing circuitry operable to:
obtain a first set of bits for wireless transmission, the first set of bits comprising a non-time-varying component;
concatenate a second set of bits to the first set of bits, the second set of bits comprising a time-varying component, wherein the second set of bits is associated with system information;
determine cyclic redundancy check (CRC) bits for the concatenated first and second set of bits;
concatenate the determined CRC bits to the concatenated first and second set of bits, wherein the second set of bits is utilized twice, such that the second set of bits (i) is utilized within the CRC bits and (ii) is carried as a part of information bits within the concatenated CRC bits and the first and second set of bits;
encode the concatenated first and second set of bits, and the determined CRC bits using a channel code; and
transmit the encoded bits to a wireless receiver.
3 . The wireless transmitter of claim 2 , wherein the time varying-component of the second set of bits is associated with a transmit beam.
4 . The wireless transmitter of claim 2 , wherein the processing operable to concatenate the second set of bits to the first set of bits is operable to:
determine cyclic redundancy check (CRC) bits for the second set of bits; and
concatenate the determined CRC bits to the second set of bits.
5 . The wireless transmitter of claim 2 , wherein the processing circuitry is operable to transmit the encoded bits to the wireless receiver by transmitting a first beam, and the processing circuitry is further operable to:
concatenate a third set of bits to the first set of wireless bits, the third set of bits comprising a time-varying component different from the second set of bits;
encode the concatenated first and third set of bits using the channel code; and
transmit the encoded bits to a wireless receiver using a second beam.
6 . The wireless transmitter of claim 5 , wherein the time-varying component of the third set of bits is associated with the second beam.
7 . The wireless transmitter of claim 5 , wherein the processing circuitry is operable to transmit the first beam in a first direction and transmit the second beam in a second direction different than the first direction.
8 . The wireless transmitter of claim 7 , wherein the first beam is adjacent the second beam.
9 . The wireless transmitter of claim 5 , wherein the processing circuitry is operable to transmit the first beam in a first transmission time interval (TTI) and transmit the second beam in a second TTI different than the first TTI.
10 . The wireless transmitter of claim 2 , wherein the channel code comprises a polar code.
11 . The wireless transmitter of claim 2 , wherein the non-time-varying component comprises system information and the time-varying component comprises a time index.
12 . The wireless transmitter of claim 11 , wherein the system information comprises a master information block (MIB), the time index comprises a synchronization signal block (SSB) index, and transmitting the encoded bits comprises transmitting a physical broadcast channel (PBCH).
13 . The wireless transmitter of claim 12 , wherein the MIB is a component of an SSB.
14 . The wireless transmitter of claim 2 , wherein the wireless transmitter is a network node.
15 . A method in a wireless receiver, the method comprising:
receiving a first signal block on a first beam, the first signal block comprising a first set of bits encoded with a channel code and representing a non-time-varying component and a second set of bits encoded with the channel code and representing a first time-varying component, wherein cyclic redundancy check (CRC) bits is determined for the concatenated first and second set of bits, the determined CRC bits is concatenated to the concatenated first and second set of bits, wherein the second set of bits is utilized twice, such that the second set of bits (i) is utilized within the CRC bits and (ii) is carried as a part of information bits within the concatenated CRC bits and the first and second set of bits; and
decoding the first set of coded bits by decoding the first signal block.
16 . A wireless receiver comprising processing circuitry operable to:
receive a first signal block on a first beam, the first signal block comprising a first set of bits encoded with a channel code and representing a non-time-varying component and a second set of bits encoded with the channel code representing a first time-varying component, wherein cyclic redundancy check (CRC) bits is determined for the concatenated first and second set of bits, the determined CRC bits is concatenated to the concatenated first and second set of bits, wherein the second set of bits is utilized twice, such that the second set of bits (i) is utilized within the CRC bits and (ii) is carried as a part of information bits within the concatenated CRC bits and the first and second set of bits; and
decode the first set of coded bits by decoding the first signal block.
17 . The wireless receiver of claim 16 , the processing circuitry further operable to:
receive a second signal block on a second beam, the second signal block comprising the first set of bits encoded with the channel code and representing the non-time-varying component and a third set of bits encoded with the channel code representing a second time-varying component different than the first time-varying component;
remove the first time-varying component from the first signal block;
remove the second time-varying component from the second signal block;
combine the first signal block and the second signal block; and
wherein the processing circuitry is operable to decode the first set of coded bits by decoding the combined first and second signal blocks.
18 . The wireless receiver of claim 17 , wherein the time varying-component of the second set of bits is associated with the first beam and the time varying-component of the third set of bits is associated with the second beam.
19 . The wireless receiver of claim 16 , wherein the processing circuitry is operable to decode using polar decoding.
20 . The wireless receiver of claim 17 , wherein the processing circuitry is operable to remove the first and second time-varying component using hypothesis testing.
21 . The wireless receiver of claim 17 , wherein the processing circuitry is operable to remove the first and second time-varying component by applying an orthogonal cover code.
22 . The wireless receiver of claim 17 , wherein the processing circuitry is operable to receive the first beam from a first direction and receive the second beam from a second direction different than the first direction.
23 . The wireless receiver of claim 22 , wherein the first beam is adjacent the second beam.
24 . The wireless receiver of claim 17 , wherein the first beam is received in a first transmission time interval (TTI) and the second beam is received in a second TTI different than the first TTI.
25 . The wireless receiver of claim 17 , wherein the non-time-varying component comprises system information and the first and second time-varying components each comprise a time index.
26 . The wireless receiver of claim 25 , wherein the system information comprises a master information block (MIB), the time index comprises a synchronization signal block (SSB) index, and receiving the first or second signal block comprises receiving a physical broadcast channel (PBCH).
27 . The wireless receiver of claim 26 , wherein the MIB is a component of an SSB.
28 . The wireless receiver of claim 16 , wherein the wireless receiver comprises a wireless device.