Self-aligned patterning of plate lines in three-dimensional ferroelectric capacitors

1 . A method of forming a three-dimensional ferroelectric capacitor structure, comprising:

forming a material stack comprising a first sacrificial layer, a second sacrificial layer above the first sacrificial layer, and a dielectric material above the first sacrificial layers and the second sacrificial layer;

forming a first metal via connected to the first sacrificial layer and a second metal via connected to the second sacrificial layer;

forming a third metal via with a ferroelectric material surrounding the third metal via;

etching the dielectric material to expose a top portion of the first metal via, a top portion of the second metal via, and a top portion of the ferroelectric material surrounding the third metal via; and

forming a hard mask material around the exposed portions of the first metal via, the second metal layer, and the ferroelectric material;

etching the material stack to expose side areas of the first sacrificial layer and the second sacrificial layer;

removing the first sacrificial layer and the second sacrificial layer; and

depositing metal in place of the removed first sacrificial layer and second sacrificial layer.

2 . The method of claim 1 , wherein the hard mask material is formed using a conformal deposition process.

3 . The method of claim 2 , wherein the conformal deposition process is an atomic layer deposition (ALD) process.

4 . The method of claim 1 , wherein the hard mask material comprises Aluminum and Oxygen.

5 . The method of claim 1 , wherein the hard mask material comprises Hafnium and Oxygen.

6 . The method of claim 1 , wherein the first sacrificial material and the second sacrificial material comprise Silicon and Nitrogen.

7 . The method of claim 1 , wherein the dielectric material is a first dielectric material, and the method further comprises depositing a second dielectric material in areas of the material stack not covered by the hard mask material.

8 . A method of forming a three-dimensional ferroelectric capacitor structure, comprising:

forming a material stack comprising a first sacrificial layer, a second sacrificial layer above the first sacrificial layer, and a dielectric material above the first sacrificial layers and the second sacrificial layer;

forming a first metal via connected to the first sacrificial layer and a second metal via connected to the second sacrificial layer;

forming a third metal via with a ferroelectric material surrounding the third metal via;

forming a hard mask above the first metal via, the second metal via, and the third metal via using a directed self-assembly (DSA) process;

etching the material stack to expose side areas of the first sacrificial layer and the second sacrificial layer;

removing the first sacrificial layer and the second sacrificial layer; and

depositing metal in place of the removed first sacrificial layer and second sacrificial layer.

9 . The method of claim 8 , wherein forming the hard mask using the DSA process comprises applying a polymer to the material stack, the polymer having a metal selective functional group to bind to the first metal via, the second metal via, and the third metal via.

10 . The method of claim 9 , wherein the polymer is a first polymer and forming the hard mask using the DSA process further comprises applying a second polymer on the material stack, the second polymer chosen to selectively bind with the first polymer.

11 . The method of claim 8 , wherein the first sacrificial material and the second sacrificial material comprise Silicon and Nitrogen.

12 . The method of claim 8 , wherein the dielectric material is a first dielectric material, and the method further comprises depositing a second dielectric material in areas of the material stack not covered by the hard mask.

13 . The method of claim 8 , further comprising removing the hard mask.

14 . A method of forming a three-dimensional ferroelectric capacitor structure, comprising:

forming a material stack comprising alternating layers of sacrificial material and dielectric material;

forming metal vias in the material stack;

forming a ferroelectric material around each respective metal via;

forming a hard mask adjacent the metal vias;

etching the material stack to expose the sacrificial material layers;

removing the sacrificial material;

depositing metal in place of the removed sacrificial material; and

depositing a dielectric in areas of the material stack not covered by the hard mask.

15 . The method of claim 14 , wherein the hard mask is formed above the metal vias using a directed self-assembly (DSA) process.

16 . The method of claim 15 , wherein forming the hard mask comprises applying a polymer to the metal vias, the polymer having a metal selective functional group to bind to the metal vias.

17 . The method of claim 16 , wherein the polymer is a first polymer and forming the hard mask further comprises applying a second polymer on the material stack, the second polymer chosen to selectively bind with the first polymer.

18 . The method of claim 14 , wherein the hard mask is formed by:

exposing a top portion of the ferroelectric material surrounding the metal vias; and

forming a hard mask material around the exposed portions of the ferroelectric material.

19 . The method of claim 18 , wherein the hard mask material is formed using a conformal deposition process.

20 . The method of claim 18 , wherein the hard mask material comprises Aluminum and Oxygen.

21 . The method of claim 18 , wherein the hard mask material comprises Hafnium and Oxygen.

22 . The method of claim 14 , wherein the sacrificial material layers comprise Silicon and Nitrogen.

23 . The method of claim 14 , further comprising removing the hard mask after depositing the dielectric.