Power metal-oxide-semiconductor structure and manufacturing method thereof
A power metal-oxide-semiconductor structure includes a semiconductor substrate, a gate electrode disposed above the semiconductor substrate, a field plate, and an electrically conductive pattern. The gate electrode and the field plate are disposed above the semiconductor substrate, the electrically conductive pattern is disposed between the field plate and the semiconductor substrate in a vertical direction, and the field plate and the electrically conductive pattern are located at the same side of the gate electrode in a horizontal direction. A manufacturing method of a power metal-oxide-semiconductor structure includes the following steps. The electrically conductive pattern and the field plate are formed above a first region of the semiconductor substrate. Subsequently, the gate electrode is formed above the first region of the semiconductor substrate.
1 . A power metal-oxide-semiconductor structure, comprising:
a semiconductor substrate;
a gate electrode disposed above the semiconductor substrate;
a field plate disposed above the semiconductor substrate; and
an electrically conductive pattern disposed between the field plate and the semiconductor substrate in a vertical direction, wherein the field plate and the electrically conductive pattern are located at the same side of the gate electrode in a horizontal direction, and a topmost surface of the electrically conductive pattern is lower than a topmost surface of the gate electrode in the vertical direction.
2 . The power metal-oxide-semiconductor structure according to claim 1 , wherein the electrically conducive pattern is an electrically floating pattern electrically separated from the field plate and the gate electrode.
3 . The power metal-oxide-semiconductor structure according to claim 1 , further comprising:
a drain doped region disposed in the semiconductor substrate, wherein the field plate and the electrically conductive pattern are located between the drain doped region and the gate electrode in the horizontal direction.
4 . The power metal-oxide-semiconductor structure according to claim 3 , further comprising:
a drift region disposed in the semiconductor substrate, wherein the drain doped region is located in the drift region, and at least a part of the electrically conductive pattern and at least a part of the field plate are located above the drift region in the vertical direction; and
a source doped region disposed in the semiconductor substrate, wherein the source doped region and the drain doped region are located at two opposite sides of the gate electrode in the horizontal direction.
5 . The power metal-oxide-semiconductor structure according to claim 1 , further comprising:
a first dielectric structure disposed between the field plate and the electrically conductive pattern in the vertical direction.
6 . The power metal-oxide-semiconductor structure according to claim 5 , wherein the first dielectric structure comprises an oxide-nitride-oxide (ONO) structure.
7 . The power metal-oxide-semiconductor structure according to claim 1 , further comprising:
a second dielectric structure disposed above the semiconductor substrate, wherein the second dielectric structure is partly disposed between the field pate and the gate electrode in the horizontal direction and partly disposed between the electrically conductive pattern and the gate electrode in the horizontal direction.
8 . The power metal-oxide-semiconductor structure according to claim 7 , wherein the second dielectric structure comprises an oxide-nitride-oxide (ONO) structure.
9 . The power metal-oxide-semiconductor structure according to claim 7 , wherein a part of the second dielectric structure is located above the electrically conductive pattern in the vertical direction.
10 . The power metal-oxide-semiconductor structure according to claim 1 , wherein the field plate is electrically connected with the gate electrode.
11 . The power metal-oxide-semiconductor structure according to claim 7 , wherein the second dielectric structure directly contacts the field plate and the gate electrode.
12 . The power metal-oxide-semiconductor structure according to claim 7 , wherein a part of the second dielectric structure is located directly above the electrically conductive pattern in the vertical direction.
13 . The power metal-oxide-semiconductor structure according to claim 1 , wherein a topmost surface of the field plate is lower than the topmost surface of the gate electrode in the vertical direction.