Semiconductor device and method of manufacturing the same

1 . A semiconductor device, comprising

a field electrode in a needle-shaped field electrode trench extending from a frontside of a semiconductor body into the semiconductor body;

a lower metallization layer on the frontside of the semiconductor body and electrically connected to the field electrode;

an insulating layer on the lower metallization layer;

an upper metallization layer on the insulating layer; and

a first interconnect electrically connecting the lower metallization layer to the upper metallization layer,

wherein in a top view, the first interconnect is laterally offset from the field electrode trench, such that the lower metallization layer is not physically connected to the upper metallization layer by the first interconnect in a region vertically above the field electrode trench.

2 . The semiconductor device of claim 1 , wherein the upper metallization layer extends in the region vertically above the field electrode trench and is isolated there from the lower metallization layer by the insulating layer.

3 . The semiconductor device of claim 1 , wherein the field electrode is arranged in a device cell and the first interconnect is arranged outside of the device cell.

4 . The semiconductor device of claim 3 , wherein a first conductor line is formed in the lower metallization layer, extending across the device cell, and connected to the field electrode, and wherein the first conductor line has a lateral width smaller than a lateral width of the device cell.

5 . The semiconductor device of claim 4 , wherein a second conductor line is formed in the lower metallization layer aside the first conductor line, and wherein the second conductor line is electrically connected to a source region and/or a body region of the device cell.

6 . The semiconductor device of claim 5 , wherein the body region of the device cell, which comprises a channel region and extends, in the top view, around the field electrode, is electrically connected to the second conductor line via a body contact, and wherein the body contact is interrupted in an interruption region vertically below the first conductor line.

7 . The semiconductor device of claim 6 , wherein a high dose implant region of the interruption region has a same doping type and a higher doping concentration than the body region.

8 . The semiconductor device of claim 3 , wherein the device cell is one of a plurality of device cells disposed aside each other in a first lateral direction, and wherein the first interconnect is disposed in or laterally outside of a first outermost one of the device cells.

9 . The semiconductor device of claim 8 , wherein a first conductor line is formed in the lower metallization layer, extending across the plurality of device cells, and connected to the field electrode, wherein the first conductor line has a lateral width smaller than a lateral width of each of the plurality of device cells, and wherein the first conductor line extends across the plurality of device cells.

10 . The semiconductor device of claim 9 , wherein the insulating layer extends as a continuous layer across the plurality of device cells and isolates the first conductor line from the upper metallization layer.

11 . The semiconductor device of claim 9 , wherein the first conductor line extends with curves and/or bends across the plurality of device cells.

12 . The semiconductor device of claim 11 , wherein the first conductor line extends across the plurality of device cells in a meandering shape.

13 . The semiconductor device of claim 1 , wherein the lower metallization layer is made of tungsten.

14 . A method for manufacturing a semiconductor device, the method comprising:

forming a field electrode in a needle-shaped field electrode trench extending from a frontside of a semiconductor body into the semiconductor body;

forming a lower metallization layer on the frontside of the semiconductor body and electrically connected to the field electrode;

forming an insulating layer on the lower metallization layer;

forming an upper metallization layer on the insulating layer; and

forming a first interconnect electrically connecting the lower metallization layer to the upper metallization layer,

wherein in a top view, the first interconnect is laterally offset from the field electrode trench, such that the lower metallization layer is not physically connected to the upper metallization layer by the first interconnect in a region vertically above the field electrode trench.

15 . The method of claim 14 , further comprising:

forming a first conductor line in the lower metallization layer that extends across a device cell of the semiconductor device and is connected to the field electrode, wherein the first conductor line has a lateral width smaller than a lateral width of the device cell; and

simultaneously forming with the first conductor line a gate conductor line that electrically contacts a gate region of the semiconductor device.

16 . The method of claim 15 , further comprising:

forming a second conductor line in the lower metallization layer aside the first conductor line; and

electrically connecting the second conductor line to a source region and/or a body region of the semiconductor device.

17 . The method of claim 16 , further comprising:

electrically connecting the body region of the device cell, which comprises a channel region and extends, in the top view, around the field electrode, to the second conductor line via a body contact; and

interrupting the body contact in an interruption region vertically below the first conductor line.

18 . The method of claim 17 , further comprising:

forming a high dose implant region in the interruption region,

wherein the high dose implant region has a same doping type and a higher doping concentration than the body region.

19 . The method of claim 14 , further comprising:

forming a first conductor line in the lower metallization layer and extending across a plurality of device cells of the semiconductor device, the first conductor line having a lateral width smaller than a lateral width of the plurality of device cells; and

electrically connecting the first conductor line to the field electrode.