IP Library › Granted Patent US 12713697
Granted Patent B2
US 12713697 · App. 18/236,032 · Granted Aug 18, 2026

Drive substrates and display panels

Inventor: Chuanbao Luo (Shenzhen, CN)
Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
H10D86/60H10D86/431H10D86/471H10H20/857H10W90/00
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Quick Facts
Patent No.
US 12713697
App. No.
18/236,032
Granted
Aug 18, 2026
Kind
B2
Abstract

Drive substrates and display panels are provided. In a thin film transistor of the drive substrate, a structure with double-gate and double-active layer is formed by a first active layer, a first gate, a first sub-gate of a second gate, and a part of a second active layer in an area adjacent to an output electrode; and a structure with single active layer and top gate is formed by a second sub-gate of the second gate and a part of the second active layer in an area adjacent to an input electrode. The first gate and the second gate together control a first channel of the first active layer and a first portion of a second channel of the second active layer.

Claims (44)

1 . A drive substrate, comprising:

a base;

a first gate, disposed on the base;

a first insulation layer, disposed on the base and covering the first gate;

a first active layer, disposed on the first insulation layer and comprising a first channel overlapping the first gate;

a second active layer, comprising a second channel, a first contact portion, and a second contact portion, wherein the second channel comprises a first portion and a second portion connected with each other; the first contact portion is connected to a side of the first portion away from the second portion, and the second contact portion is connected to a side of the second portion away from the first portion; the first portion is directly connected to the first channel; and the second portion and the first channel are both attached to the first insulation layer, and the second portion is disposed on a side of the first channel away from the first contact portion in a direction parallel to the first insulation layer;

a second insulation layer, disposed on the second active layer;

a second gate, disposed on the second insulation layer and comprising a first sub-gate and a second sub-gate connected with each other, wherein the first sub-gate overlaps the first portion, and the second sub-gate overlaps the second portion;

an input electrode, connected to the second contact portion; and

an output electrode, connected to the first contact portion.

2 . The drive substrate according to claim 1 , wherein the first contact portion and the first channel are both attached to the first insulation layer, and the first contact portion is connected to a lateral surface of the first channel.

3 . The drive substrate according to claim 2 , wherein based on an upper surface of the first insulation layer, the first contact portion is overlapped with the lateral surface of the first channel, and a height of the first contact portion 42 b is greater than a height of the first channel 41 a.

4 . The drive substrate according to claim 1 , wherein the first active layer further comprises a third contact portion connected to a side of the first channel, and the first contact portion is stacked on and connected to the third contact portion.

5 . The drive substrate according to claim 2 , wherein a resistance value of the first contact portion and a resistance value of the second contact portion are both less than a resistance value of the first channel and less than a resistance value of the second channel.

6 . The drive substrate according to claim 5 , wherein a doping concentration of the first contact portion is greater than a doping concentration of the second contact portion.

7 . The drive substrate according to claim 1 , wherein in an orthographic projection of the drive substrate, both of a projection of the first sub-gate and a projection of the first gate completely cover a projection of the first channel and a projection of the first portion.

8 . The drive substrate according to claim 1 , wherein a length of the first channel is 15% to 30% of a length of the second channel.

9 . The drive substrate according to claim 1 , wherein a carrier concentration of the first active layer is less than or equal to a carrier concentration of the second active layer.

10 . The drive substrate according to claim 1 , further comprising:

a passivation layer, covering the input electrode and the output electrode; and

a conductive layer, disposed on the passivation layer and connected to the output electrode.

11 . A display panel, comprising:

a drive substrate, comprising:

a base;

a first gate, disposed on the base;

a first insulation layer, disposed on the base and covering the first gate;

a first active layer, disposed on the first insulation layer and comprising a first channel overlapping the first gate;

a second active layer, comprising a second channel, a first contact portion, and a second contact portion, wherein the second channel comprises a first portion and a second portion connected with each other; the first contact portion is connected to a side of the first portion away from the second portion, and the second contact portion is connected to a side of the second portion away from the first portion; the first portion is directly connected to the first channel; and the second portion and the first channel are both attached to the first insulation layer, and the second portion is disposed on a side of the first channel away from the first contact portion in a direction parallel to the first insulation layer;

a second insulation layer, disposed on the second active layer;

a second gate, disposed on the second insulation layer and comprising a first sub-gate and a second sub-gate connected with each other, wherein the first sub-gate overlaps the first portion, and the second sub-gate overlaps the second portion;

an input electrode, connected to the second contact portion; and

an output electrode, connected to the first contact portion; and

a light emitting element, disposed on the drive substrate and connected to the output electrode.

12 . The display panel according to claim 11 , wherein the first contact portion and the first channel are both attached to the first insulation layer, and the first contact portion is connected to a lateral surface of the first channel.

13 . The display panel according to claim 12 , wherein based on an upper surface of the first insulation layer, the first contact portion is overlapped with the lateral surface of the first channel, and a height of the first contact portion 42 b is greater than a height of the first channel 41 a.

14 . The display panel according to claim 11 , wherein the first active layer further comprises a third contact portion connected to a side of the first channel, and the first contact portion is stacked on and connected to the third contact portion.

15 . The display panel according to claim 12 , wherein a resistance value of the first contact portion and a resistance value of the second contact portion are both less than a resistance value of the first channel and less than a resistance value of the second channel.

16 . The display panel according to claim 15 , wherein a doping concentration of the first contact portion is greater than a doping concentration of the second contact portion.

17 . The display panel according to claim 11 , wherein in an orthographic projection of the drive substrate, both of a projection of the first sub-gate and a projection of the first gate completely cover a projection of the first channel and a projection of the first portion.

18 . The display panel according to claim 11 , wherein a length of the first channel is 15% to 30% of a length of the second channel.

19 . The display panel according to claim 11 , wherein a carrier concentration of the first active layer is less than or equal to a carrier concentration of the second active layer.

20 . The display panel according to claim 11 , wherein the drive substrate further comprises:

a passivation layer, covering the input electrode and the output electrode; and

a conductive layer, disposed on the passivation layer and connecting the light emitting element and the output electrode.