IP Library Granted Patent US 12713703
Granted Patent B2
US 12713703 · App. 18/447,999 · Granted Aug 18, 2026

Power gating cell structure

Inventors: Wei-Ling Chang (Hsinchu City, TW); Jung-Chan Yang (Taoyuan County, TW); Li-Chun Tien (Tainan City, TW); Ting Yu Chen (Hsinchu City, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H10D89/10H03K19/17772H10D84/0149H10D84/0158H10D84/038H10D84/834
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12713703
App. No.
18/447,999
Granted
Aug 18, 2026
Kind
B2
Abstract

A power gating cell on an integrated circuit is provided. The power gating cell includes: a central area; a peripheral area surrounding the central area; a first active region located in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction; and a plurality of second active regions located in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction.

Claims (37)

1 . A power gating cell on an integrated circuit, comprising:

a central area;

a peripheral area adjacent the central area;

a first active region located in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction;

a plurality of second active regions located in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction; and

a third active region located in the central area, the third active region separated from the first active region and having a third width in the first direction corresponding to at least four fin structures extending in the second direction perpendicular to the first direction,

wherein the power gating cell is a header cell configured to cut off a power supply to a standard logic cell on the integrated circuit in response to a control signal.

2 . The power gating cell of claim 1 , wherein the integrated circuit has a set of global fin grids extending in the second direction, and the at least four fin structures corresponding to the first active region are aligned with the set of global fin grids.

3 . The power gating cell of claim 1 , wherein the at least one and no more than three fin structures corresponding to each of the plurality of second active regions are not aligned with the set of global fin grids.

4 . The power gating cell of claim 1 , wherein the second width corresponds to one fin structure.

5 . The power gating cell of claim 1 , wherein the second width corresponds to two fin structures.

6 . The power gating cell of claim 1 , wherein the second width corresponds to three fin structures.

7 . The power gating cell of claim 1 , wherein the peripheral area surrounds the central area.

8 . A power gating cell on an integrated circuit, comprising:

a central area;

a peripheral area adjacent the central area;

a first active region located in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction;

a plurality of second active regions located in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction; and

a third active region located in the central area, the third active region separated from the first active region and having a third width in the first direction corresponding to at least four fin structures extending in the second direction perpendicular to the first direction,

wherein the power gating cell is a footer cell configured to cut off a power supply to a standard logic cell on the integrated circuit in response to a control signal.

9 . The power gating cell of claim 8 , wherein the integrated circuit has a set of global fin grids extending in the second direction, and the at least four fin structures corresponding to the first active region are aligned with the set of global fin grids.

10 . The power gating cell of claim 8 , wherein the at least one and no more than three fin structures corresponding to each of the plurality of second active regions are not aligned with the set of global fin grids.

11 . The power gating cell of claim 8 , wherein the second width corresponds to one fin structure.

12 . The power gating cell of claim 8 , wherein the second width corresponds to two fin structures.

13 . The power gating cell of claim 8 , wherein the second width corresponds to three fin structures.

14 . A power gating cell on an integrated circuit, comprising:

a central area;

a peripheral area adjacent the central area;

a first active region located in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction;

a plurality of second active regions located in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction; and

a third active region located in the central area, the third active region separated from the first active region and having a third width in the first direction corresponding to at least four fin structures extending in the second direction perpendicular to the first direction.

15 . The power gating cell of claim 14 , wherein the integrated circuit has a set of global fin grids extending in the second direction, and the at least four fin structures corresponding to the first active region are aligned with the set of global fin grids.

16 . The power gating cell of claim 14 , wherein the at least one and no more than three fin structures corresponding to each of the plurality of second active regions are not aligned with the set of global fin grids.

17 . The power gating cell of claim 14 , wherein the second width corresponds to one fin structure.

18 . The power gating cell of claim 14 , wherein the second width corresponds to two fin structures.

19 . The power gating cell of claim 14 , wherein the second width corresponds to three fin structures.

20 . The power gating cell of claim 14 , wherein the peripheral area surrounds the central area.