Image sensor
An image sensor includes: a pixel array including a plurality of pixels; and a logic circuit acquiring a pixel signal from the plurality of pixels, wherein each of the plurality of pixels includes a photodiode and a pixel circuit region disposed on the photodiode, wherein the pixel array includes a plurality of pixel groups each having four or more pixels, among the plurality of pixels, adjacent to each other in the first direction and the second direction, wherein the pixel circuit region in each of the plurality of pixel groups includes a plurality of transistors, wherein at least one of the plurality of transistors is a driving transistor including a first active region, a second active region, and a gate structure disposed between the first active region and the second active region in a third direction intersecting the first direction and the second direction.
1 . An image sensor comprising:
a pixel array including a plurality of pixels arranged in first and second directions that are parallel to an upper surface of a substrate and substantially perpendicular to each other; and
a logic circuit acquiring a pixel signal from the plurality of pixels,
wherein each of the plurality of pixels includes at least one photodiode and a pixel circuit region disposed on the at least one photodiode,
wherein the pixel array includes a plurality of pixel groups each having four or more pixels, among the plurality of pixels, adjacent to each other in the first direction and the second direction, wherein the pixel circuit region in each of the plurality of pixel groups includes a plurality of transistors,
wherein at least one of the plurality of transistors is a driving transistor including a first active region, a second active region, and a gate structure disposed between the first active region and the second active region in a third direction parallel to the upper surface of the substrate and intersecting the first direction and the second direction, and
wherein the gate structure includes a first gate region, a second gate region, and a third gate region, wherein the first gate region extends in the first direction, wherein the second gate region extends in the second direction, and the third gate region extends in a fourth direction that is different from the first, second and third directions.
2 . The image sensor of claim 1 , wherein
the plurality of transistors in each of the plurality of pixel groups further include a reset transistor and a selection transistor, and
at least one of the reset transistor or the selection transistor has the same structure as a structure of the driving transistor.
3 . The image sensor of claim 1 , wherein
the gate structure of the driving transistor includes a first edge and a second edge, wherein the first edge is separated from the first active region and the second active region and extends in the first direction, and the second edge is separated from the first active region and the second active region and extends in the second direction, and
a length of the first edge is substantially equal to a length of the second edge.
4 . The image sensor of claim 1 , wherein
the gate structure of the driving transistor includes a first edge and a second edge, wherein the first edge is separated from the first active region and the second active region and extends in the first direction, and the second edge is separated from the first active region and the second active region and extends in the second direction, and
a length of the first edge is different from a length of the second edge.
5 . The image sensor of claim 1 , wherein the gate structure of the driving transistor has a symmetrical structure with respect to a line extending through a center of the gate structure in the third direction.
6 . The image sensor of claim 1 , wherein the driving transistor includes at least one first active contact connected to the first active region and at least one second active contact connected to the second active region, and a number of the at least one first active contact is different from a number of the at least one second active contact.
7 . The image sensor of claim 6 , wherein
the number of the at least one first active contact is less than the number of the least one second active contact, and
an area of the first active region is less than an area of the second active region.
8 . The image sensor of claim 7 , wherein the number of the at least one second active contact is 2.
9 . The image sensor of claim 6 , wherein the first active region is a source region, and the second active region is a drain region.
10 . The image sensor of claim 1 , wherein
the driving transistor includes a first active contact and a second active contact, wherein the first active contact is connected to the first active region, and the second active contact is connected to the second active region, and
the first active region is a source region and the second active region is a drain region.
11 . The image sensor of claim 1 , wherein the fourth direction is parallel to the upper surface of the substrate and is substantially perpendicular to the third direction.
12 . The image sensor of claim 1 , wherein each of an area of the first gate region and an area of the second gate region is less than an area of the third gate region.
13 . The image sensor of claim 1 , wherein a length of a side surface of the gate structure in contact with the first active region is different from a length of a side surface of the gate structure in contact with the second active region.
14 . The image sensor of claim 1 , wherein a length of a channel of the driving transistor is less than about ½ of a width of the channel of the driving transistor.
15 . The image sensor of claim 1 , wherein a width of a channel of the driving transistor gradually increases in the third direction.
16 . The image sensor of claim 1 , wherein each of the plurality of pixel groups includes four pixels.
17 . The image sensor of claim 1 , wherein each of the plurality of pixel groups includes eight pixels.
18 . An image sensor comprising:
a pixel array including a plurality of pixels are arranged in first and second directions parallel to a first surface of a substrate and substantially perpendicular to each other; and
a logic circuit acquiring a pixel signal from the plurality of pixels,
wherein each of the plurality of pixels includes at least one photodiode and a pixel circuit region disposed on the at least one photodiode,
wherein the pixel array includes a plurality of pixel groups each having four or more pixels, among the plurality of pixels, adjacent to each other in the first direction and the second direction, wherein the pixel circuit region in each of the plurality of pixel groups includes a plurality of transistors,
wherein at least one of the plurality of transistors is a driving transistor including a first active region, a second active region, and a gate structure, wherein at least one of the first active region or the second active region is adjacent to a corner of a pixel including the driving transistor, wherein the gate structure is separated from the corner, and wherein the first active region, the second active region, and the gate structure are disposed between the first active region and the second active region in a third direction intersecting the first direction and the second direction, and
wherein the gate structure includes a first gate region, a second gate region, and a third gate region, wherein the first gate region extends in the first direction, wherein the second gate region extends in the second direction, and the third gate region extends in a fourth direction that is different from the first, second and third directions.