Image sensor

1 . An image sensor comprising:

a substrate;

a unit pixel region in the substrate and including a photoelectric conversion region;

a pixel isolation trench defining the unit pixel region, penetrating the substrate in a vertical direction, and extending in a first horizontal direction and a second horizontal direction crossing each other; and

a pixel isolation structure in the pixel isolation trench,

wherein

the pixel isolation structure includes

a dielectric layer on an inner wall of the pixel isolation trench;

a first semiconductor pattern conformally on the dielectric layer and including a first dopant;

a first insulating layer on a first portion of the first semiconductor pattern overlapping the photoelectric conversion region in one of the first horizontal direction and the second horizontal direction;

a second semiconductor pattern on a second portion of the first semiconductor pattern that does not overlap the photoelectric conversion region in the first horizontal direction and the second horizontal direction,

the photoelectric conversion region includes a doped region on an outer wall of the pixel isolation structure, and

the doped region includes the first dopant.

2 . The image sensor of claim 1 , wherein the first dopant includes a P-type dopant.

3 . The image sensor of claim 2 , wherein the P-type dopant includes at least one of boron (B), aluminum (Al), or indium (In).

4 . The image sensor of claim 1 , wherein the first insulating layer includes silicon nitride.

5 . The image sensor of claim 1 , wherein the first insulating layer includes

an insulating liner including silicon nitride; and

a first buried insulating layer including silicon oxide.

6 . The image sensor of claim 1 , wherein the first insulating layer is not between the second semiconductor pattern and the first semiconductor pattern.

7 . The image sensor of claim 1 , further comprising a second buried insulating layer on the second semiconductor pattern.

8 . The image sensor of claim 1 , wherein the dielectric layer has a thickness in a range from 1 nm to 200 nm.

9 . The image sensor of claim 1 , wherein the first semiconductor pattern has a thickness in a range from 1 nm to 50 nm.

10 . An image sensor comprising:

a substrate;

a plurality of unit pixel regions in the substrate and spaced apart from each other in a first horizontal direction and a second horizontal direction;

a plurality of photoelectric conversion regions within the plurality of unit pixel regions and including a doped region, respectively;

a lattice-shaped pixel isolation trench defining the plurality of unit pixel regions and penetrating the substrate in a vertical direction; and

a pixel isolation structure within the pixel isolation trench,

wherein

the pixel isolation trench includes a first region and a second region in the first horizontal direction and the second horizontal direction, and the first region is a region excluding the second region, and the second region includes a central region that does not overlap with the photoelectric conversion region in the first horizontal direction and the second horizontal direction,

the pixel isolation structure includes a dielectric layer on an inner wall of the pixel isolation trench;

a first semiconductor pattern conformally on the dielectric layer and including a first dopant;

a first buried insulating layer in the first region on the first semiconductor pattern; and

a second semiconductor pattern in the second region on the first semiconductor pattern, and

the doped region includes the first dopant.

11 . The image sensor of claim 10 , wherein the first dopant includes a P-type dopant.

12 . The image sensor of claim 11 , wherein the P-type dopant includes at least one of boron, aluminum, or indium.

13 . The image sensor of claim 10 , wherein the pixel isolation structure further includes an insulating liner between the first semiconductor pattern and the first buried insulating layer in the first region.

14 . The image sensor of claim 10 , wherein the pixel isolation structure further includes a second buried insulating layer on the second semiconductor pattern in the second region.

15 . The image sensor of claim 10 , wherein the second region further includes an extension region extending in at least one of the first horizontal direction and the second horizontal direction.

16 . The image sensor of claim 15 , wherein the second region has a cross-shape in a plan view.

17 . The image sensor of claim 10 , wherein the first semiconductor pattern includes polysilicon including the first dopant.

18 . The image sensor of claim 10 , wherein the dielectric layer includes at least one of SiO 2 , Si 3 N 4 , SiCN, SiOCN, and SiON.

19 . The image sensor of claim 10 , wherein the second semiconductor pattern includes polysilicon including no dopant.

20 . An image sensor comprising:

a substrate having a first surface and a second surface opposite to each other;

a plurality of photoelectric conversion regions spaced apart from each other in a first horizontal direction and a second horizontal direction, including a first photoelectric conversion region in the substrate in a direction perpendicular to a first surface; a second photoelectric conversion region overlapping with the first photoelectric conversion region in one of the first horizontal direction and the second horizontal direction; and a third photoelectric conversion region not overlapping with the first photoelectric conversion region in the first horizontal direction and the second horizontal direction;

a pixel isolation structure between each of the plurality of photoelectric conversion regions and in a pixel isolation trench penetrating through the substrate from the first surface; and

a color filter and a micro lens on the second surface,

wherein

the pixel isolation trench includes: a straight-line shaped first trench region between the first photoelectric conversion region and the second photoelectric conversion region and a cross-shaped second trench region between the first photoelectric conversion region and the third photoelectric conversion region,

the pixel isolation structure includes a dielectric layer on inner walls of the first trench region and the second trench region of the pixel isolation trench; a first semiconductor pattern that conformally covers the dielectric layer and includes polysilicon doped with boron (B); a first insulating layer on the first semiconductor pattern in the first trench region and including silicon nitride; and a second semiconductor pattern disposed on the first semiconductor pattern in the second trench region and including undoped polysilicon,

the plurality of photoelectric conversion regions each include a doped region on an outer wall of each of the first trench region and the second trench region, and

the doped region is doped with boron (B).